Commit e11c1a7e authored by Kan Liang's avatar Kan Liang Committed by Peter Zijlstra
Browse files

perf/x86: Factor out x86_pmu_show_pmu_cap 



The PMU capabilities are different among hybrid PMUs. Perf should dump
the PMU capabilities information for each hybrid PMU.

Factor out x86_pmu_show_pmu_cap() which shows the PMU capabilities
information. The function will be reused later when registering a
dedicated hybrid PMU.

Signed-off-by: default avatarKan Liang <kan.liang@linux.intel.com>
Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: default avatarAndi Kleen <ak@linux.intel.com>
Link: https://lkml.kernel.org/r/1618237865-33448-16-git-send-email-kan.liang@linux.intel.com
parent b9856729

arch/x86/events/core.c

+16 −9
Original line number Diff line number Diff line
@@ -1976,6 +1976,20 @@ static void _x86_pmu_read(struct perf_event *event) 
	x86_perf_event_update(event);

}



void x86_pmu_show_pmu_cap(int num_counters, int num_counters_fixed,

			  u64 intel_ctrl)

{

	pr_info("... version:                %d\n",     x86_pmu.version);

	pr_info("... bit width:              %d\n",     x86_pmu.cntval_bits);

	pr_info("... generic registers:      %d\n",     num_counters);

	pr_info("... value mask:             %016Lx\n", x86_pmu.cntval_mask);

	pr_info("... max period:             %016Lx\n", x86_pmu.max_period);

	pr_info("... fixed-purpose events:   %lu\n",

			hweight64((((1ULL << num_counters_fixed) - 1)

					<< INTEL_PMC_IDX_FIXED) & intel_ctrl));

	pr_info("... event mask:             %016Lx\n", intel_ctrl);

}



static int __init init_hw_perf_events(void)

{

	struct x86_pmu_quirk *quirk;
@@ -2036,15 +2050,8 @@ static int __init init_hw_perf_events(void) 


	pmu.attr_update = x86_pmu.attr_update;



	pr_info("... version:                %d\n",     x86_pmu.version);

	pr_info("... bit width:              %d\n",     x86_pmu.cntval_bits);

	pr_info("... generic registers:      %d\n",     x86_pmu.num_counters);

	pr_info("... value mask:             %016Lx\n", x86_pmu.cntval_mask);

	pr_info("... max period:             %016Lx\n", x86_pmu.max_period);

	pr_info("... fixed-purpose events:   %lu\n",

			hweight64((((1ULL << x86_pmu.num_counters_fixed) - 1)

					<< INTEL_PMC_IDX_FIXED) & x86_pmu.intel_ctrl));

	pr_info("... event mask:             %016Lx\n", x86_pmu.intel_ctrl);

	x86_pmu_show_pmu_cap(x86_pmu.num_counters, x86_pmu.num_counters_fixed,

			     x86_pmu.intel_ctrl);



	if (!x86_pmu.read)

		x86_pmu.read = _x86_pmu_read;

arch/x86/events/perf_event.h

+3 −0
Original line number Diff line number Diff line
@@ -1092,6 +1092,9 @@ void x86_pmu_enable_event(struct perf_event *event); 


int x86_pmu_handle_irq(struct pt_regs *regs);



void x86_pmu_show_pmu_cap(int num_counters, int num_counters_fixed,

			  u64 intel_ctrl);



extern struct event_constraint emptyconstraint;



extern struct event_constraint unconstrained;