Commit e0f4c59d authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'x86_cpu_for_v5.16_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86 cpu updates from Borislav Petkov:

 - Start checking a CPUID bit on AMD Zen3 which states that the CPU
   clears the segment base when a null selector is written. Do the
   explicit detection on older CPUs, zen2 and hygon specifically, which
   have the functionality but do not advertize the CPUID bit. Factor in
   the presence of a hypervisor underneath the kernel and avoid doing
   the explicit check there which the HV might've decided to not
   advertize for migration safety reasons, or similar.

 - Add support for a new X86 CPU vendor: VORTEX. Needed for whitelisting
   those CPUs in the hardware vulnerabilities detection

 - Force the compiler to use rIP-relative addressing in the fallback
   path of static_cpu_has(), in order to avoid unnecessary register
   pressure

* tag 'x86_cpu_for_v5.16_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/cpu: Fix migration safety with X86_BUG_NULL_SEL
  x86/CPU: Add support for Vortex CPUs
  x86/umip: Downgrade warning messages to debug loglevel
  x86/asm: Avoid adding register pressure for the init case in static_cpu_has()
  x86/asm: Add _ASM_RIP() macro for x86-64 (%rip) suffix
parents 18398bb8 415de440

arch/x86/Kconfig.cpu

+13 −0
Original line number Diff line number Diff line
@@ -508,3 +508,16 @@ config CPU_SUP_ZHAOXIN 
	  CPU might render the kernel unbootable.



	  If unsure, say N.



config CPU_SUP_VORTEX_32

	default y

	bool "Support Vortex processors" if PROCESSOR_SELECT

	depends on X86_32

	help

	  This enables detection, tunings and quirks for Vortex processors



	  You need this enabled if you want your kernel to run on a

	  Vortex CPU. Disabling this option on other types of CPUs

	  makes the kernel a tiny bit smaller.



	  If unsure, say N.

arch/x86/include/asm/asm.h

+5 −0
Original line number Diff line number Diff line
@@ -6,11 +6,13 @@ 
# define __ASM_FORM(x, ...)		x,## __VA_ARGS__

# define __ASM_FORM_RAW(x, ...)		x,## __VA_ARGS__

# define __ASM_FORM_COMMA(x, ...)	x,## __VA_ARGS__,

# define __ASM_REGPFX			%

#else

#include <linux/stringify.h>

# define __ASM_FORM(x, ...)		" " __stringify(x,##__VA_ARGS__) " "

# define __ASM_FORM_RAW(x, ...)		    __stringify(x,##__VA_ARGS__)

# define __ASM_FORM_COMMA(x, ...)	" " __stringify(x,##__VA_ARGS__) ","

# define __ASM_REGPFX			%%

#endif



#define _ASM_BYTES(x, ...)	__ASM_FORM(.byte x,##__VA_ARGS__ ;)
@@ -49,6 +51,9 @@ 
#define _ASM_SI		__ASM_REG(si)

#define _ASM_DI		__ASM_REG(di)



/* Adds a (%rip) suffix on 64 bits only; for immediate memory references */

#define _ASM_RIP(x)	__ASM_SEL_RAW(x, x (__ASM_REGPFX rip))



#ifndef __x86_64__

/* 32 bit */

arch/x86/include/asm/cpufeature.h

+9 −4
Original line number Diff line number Diff line
@@ -173,20 +173,25 @@ extern void clear_cpu_cap(struct cpuinfo_x86 *c, unsigned int bit); 
 * means that the boot_cpu_has() variant is already fast enough for the

 * majority of cases and you should stick to using it as it is generally

 * only two instructions: a RIP-relative MOV and a TEST.

 *

 * Do not use an "m" constraint for [cap_byte] here: gcc doesn't know

 * that this is only used on a fallback path and will sometimes cause

 * it to manifest the address of boot_cpu_data in a register, fouling

 * the mainline (post-initialization) code.

 */

static __always_inline bool _static_cpu_has(u16 bit)

{

	asm_volatile_goto(

		ALTERNATIVE_TERNARY("jmp 6f", %P[feature], "", "jmp %l[t_no]")

		".section .altinstr_aux,\"ax\"\n"

		".pushsection .altinstr_aux,\"ax\"\n"

		"6:\n"

		" testb %[bitnum],%[cap_byte]\n"

		" testb %[bitnum]," _ASM_RIP(%P[cap_byte]) "\n"

		" jnz %l[t_yes]\n"

		" jmp %l[t_no]\n"

		".previous\n"

		".popsection\n"

		 : : [feature]  "i" (bit),

		     [bitnum]   "i" (1 << (bit & 7)),

		     [cap_byte] "m" (((const char *)boot_cpu_data.x86_capability)[bit >> 3])

		     [cap_byte] "i" (&((const char *)boot_cpu_data.x86_capability)[bit >> 3])

		 : : t_yes, t_no);

t_yes:

	return true;

arch/x86/include/asm/processor.h

+2 −1
Original line number Diff line number Diff line
@@ -164,7 +164,8 @@ enum cpuid_regs_idx { 
#define X86_VENDOR_NSC		8

#define X86_VENDOR_HYGON	9

#define X86_VENDOR_ZHAOXIN	10

#define X86_VENDOR_NUM		11

#define X86_VENDOR_VORTEX	11

#define X86_VENDOR_NUM		12



#define X86_VENDOR_UNKNOWN	0xff

arch/x86/kernel/cpu/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -43,6 +43,7 @@ obj-$(CONFIG_CPU_SUP_CENTAUR) += centaur.o 
obj-$(CONFIG_CPU_SUP_TRANSMETA_32)	+= transmeta.o

obj-$(CONFIG_CPU_SUP_UMC_32)		+= umc.o

obj-$(CONFIG_CPU_SUP_ZHAOXIN)		+= zhaoxin.o

obj-$(CONFIG_CPU_SUP_VORTEX_32)		+= vortex.o



obj-$(CONFIG_X86_MCE)			+= mce/

obj-$(CONFIG_MTRR)			+= mtrr/