Commit e0b9d139 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus 

* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
  [MIPS] SMTC: Make ack_bad_irq() safe with no IM backstop.
parents 4f33e21c 1146fe30

arch/mips/kernel/i8259.c

+1 −4
Original line number Diff line number Diff line
@@ -177,10 +177,7 @@ void mask_and_ack_8259A(unsigned int irq) 
		outb(cached_master_mask, PIC_MASTER_IMR);

		outb(0x60+irq,PIC_MASTER_CMD);	/* 'Specific EOI to master */

	}

#ifdef CONFIG_MIPS_MT_SMTC

	if (irq_hwmask[irq] & ST0_IM)

		set_c0_status(irq_hwmask[irq] & ST0_IM);

#endif /* CONFIG_MIPS_MT_SMTC */

	smtc_im_ack_irq(irq);

	spin_unlock_irqrestore(&i8259A_lock, flags);

	return;

arch/mips/kernel/irq-msc01.c

+2 −8
Original line number Diff line number Diff line
@@ -52,11 +52,8 @@ static void level_mask_and_ack_msc_irq(unsigned int irq) 
	mask_msc_irq(irq);

	if (!cpu_has_veic)

		MSCIC_WRITE(MSC01_IC_EOI, 0);

#ifdef CONFIG_MIPS_MT_SMTC

	/* This actually needs to be a call into platform code */

	if (irq_hwmask[irq] & ST0_IM)

		set_c0_status(irq_hwmask[irq] & ST0_IM);

#endif /* CONFIG_MIPS_MT_SMTC */

	smtc_im_ack_irq(irq);

}



/*
@@ -73,10 +70,7 @@ static void edge_mask_and_ack_msc_irq(unsigned int irq) 
		MSCIC_WRITE(MSC01_IC_SUP+irq*8, r | ~MSC01_IC_SUP_EDGE_BIT);

		MSCIC_WRITE(MSC01_IC_SUP+irq*8, r);

	}

#ifdef CONFIG_MIPS_MT_SMTC

	if (irq_hwmask[irq] & ST0_IM)

		set_c0_status(irq_hwmask[irq] & ST0_IM);

#endif /* CONFIG_MIPS_MT_SMTC */

	smtc_im_ack_irq(irq);

}



/*

arch/mips/kernel/irq.c

+1 −9
Original line number Diff line number Diff line
@@ -74,20 +74,12 @@ EXPORT_SYMBOL_GPL(free_irqno); 
 */

void ack_bad_irq(unsigned int irq)

{

	smtc_im_ack_irq(irq);

	printk("unexpected IRQ # %d\n", irq);

}



atomic_t irq_err_count;



#ifdef CONFIG_MIPS_MT_SMTC

/*

 * SMTC Kernel needs to manipulate low-level CPU interrupt mask

 * in do_IRQ. These are passed in setup_irq_smtc() and stored

 * in this table.

 */

unsigned long irq_hwmask[NR_IRQS];

#endif /* CONFIG_MIPS_MT_SMTC */



/*

 * Generic, controller-independent functions:

 */

arch/mips/kernel/smtc.c

+4 −1
Original line number Diff line number Diff line
@@ -25,8 +25,11 @@ 
#include <asm/smtc_proc.h>



/*

 * This file should be built into the kernel only if CONFIG_MIPS_MT_SMTC is set.

 * SMTC Kernel needs to manipulate low-level CPU interrupt mask

 * in do_IRQ. These are passed in setup_irq_smtc() and stored

 * in this table.

 */

unsigned long irq_hwmask[NR_IRQS];



#define LOCK_MT_PRA() \

	local_irq_save(flags); \

include/asm-mips/irq.h

+24 −8
Original line number Diff line number Diff line
@@ -24,7 +24,30 @@ static inline int irq_canonicalize(int irq) 
#define irq_canonicalize(irq) (irq)	/* Sane hardware, sane code ... */

#endif



#ifdef CONFIG_MIPS_MT_SMTC



struct irqaction;



extern unsigned long irq_hwmask[];

extern int setup_irq_smtc(unsigned int irq, struct irqaction * new,

                          unsigned long hwmask);



static inline void smtc_im_ack_irq(unsigned int irq)

{

	if (irq_hwmask[irq] & ST0_IM)

		set_c0_status(irq_hwmask[irq] & ST0_IM);

}



#else



static inline void smtc_im_ack_irq(unsigned int irq)

{

}



#endif /* CONFIG_MIPS_MT_SMTC */



#ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP



/*

 * Clear interrupt mask handling "backstop" if irq_hwmask

 * entry so indicates. This implies that the ack() or end()
@@ -38,6 +61,7 @@ do { \ 
		                   ~(irq_hwmask[irq] & 0x0000ff00));	\

} while (0)

#else



#define __DO_IRQ_SMTC_HOOK(irq) do { } while (0)

#endif
@@ -60,14 +84,6 @@ do { \ 
extern void arch_init_irq(void);

extern void spurious_interrupt(void);



#ifdef CONFIG_MIPS_MT_SMTC

struct irqaction;



extern unsigned long irq_hwmask[];

extern int setup_irq_smtc(unsigned int irq, struct irqaction * new,

                          unsigned long hwmask);

#endif /* CONFIG_MIPS_MT_SMTC */



extern int allocate_irqno(void);

extern void alloc_legacy_irqno(void);

extern void free_irqno(unsigned int irq);