Commit e07f41b0 authored by AngeloGioacchino Del Regno's avatar AngeloGioacchino Del Regno Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: Add configuration for PM8950 peripheral



The PM8950 features integrated peripherals like ADC, GPIO controller,
MPPs, PON keys and others.
Add them to DT files that will be imported on boards having this PMIC
combo (or one of them, anyways).

Signed-off-by: default avatarKonrad Dybcio <konrad.dybcio@somainline.org>
Co-developed-by: default avatarMarijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: default avatarMarijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221111120156.48040-10-angelogioacchino.delregno@collabora.com
parent f8d8840c
Loading
Loading
Loading
Loading
+165 −0
Original line number Diff line number Diff line
// SPDX-License-Identifier: BSD-3-Clause
/*
 * Copyright (c) 2022, AngeloGioacchino Del Regno
 *                     <angelogioacchino.delregno@somainline.org>
 * Copyright (c) 2022, Marijn Suijten <marijn.suijten@somainline.org>
 */

#include <dt-bindings/iio/qcom,spmi-vadc.h>
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
#include <dt-bindings/spmi/spmi.h>

&spmi_bus {
	pmic@0 {
		compatible = "qcom,pm8950", "qcom,spmi-pmic";
		reg = <0x0 SPMI_USID>;
		#address-cells = <1>;
		#size-cells = <0>;

		pon@800 {
			compatible = "qcom,pm8916-pon";
			reg = <0x0800>;
			mode-bootloader = <0x2>;
			mode-recovery = <0x1>;

			pwrkey {
				compatible = "qcom,pm8941-pwrkey";
				interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;
				debounce = <15625>;
				bias-pull-up;
				linux,code = <KEY_POWER>;
			};
		};

		pm8950_temp: temp-alarm@2400 {
			compatible = "qcom,spmi-temp-alarm";
			reg = <0x2400>;
			interrupts = <0 0x24 0 IRQ_TYPE_EDGE_RISING>;
			io-channels = <&pm8950_vadc VADC_DIE_TEMP>;
			io-channel-names = "thermal";
			#thermal-sensor-cells = <0>;
		};

		pm8950_vadc: adc@3100 {
			compatible = "qcom,spmi-vadc";
			reg = <0x3100>;
			interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
			#address-cells = <1>;
			#size-cells = <0>;
			#io-channel-cells = <1>;

			vcoin@5 {
				reg = <VADC_VCOIN>;
				qcom,pre-scaling = <1 1>;
			};

			vph-pwr@7 {
				reg = <VADC_VSYS>;
				qcom,pre-scaling = <1 1>;
			};

			die-temp@8 {
				reg = <VADC_DIE_TEMP>;
				qcom,pre-scaling = <1 1>;
			};

			ref-625mv@9 {
				reg = <VADC_REF_625MV>;
				qcom,pre-scaling = <1 1>;
			};

			ref-1250mv@a {
				reg = <VADC_REF_1250MV>;
				qcom,pre-scaling = <1 1>;
			};

			ref-buf-625mv@c {
				reg = <VADC_SPARE1>;
				qcom,pre-scaling = <1 1>;
			};

			ref-gnd@e {
				reg = <VADC_GND_REF>;
			};

			ref-vdd@f {
				reg = <VADC_VDD_VADC>;
			};

			pa-therm1@11 {
				reg = <VADC_P_MUX2_1_1>;
				qcom,pre-scaling = <1 1>;
				qcom,ratiometric;
				qcom,hw-settle-time = <200>;
			};

			case-therm@13 {
				reg = <VADC_P_MUX4_1_1>;
				qcom,pre-scaling = <1 1>;
				qcom,ratiometric;
				qcom,hw-settle-time = <200>;
			};

			xo-therm@32 {
				reg = <VADC_LR_MUX3_XO_THERM>;
				qcom,pre-scaling = <1 1>;
				qcom,ratiometric;
				qcom,hw-settle-time = <200>;
			};

			pa-therm0@36 {
				reg = <VADC_LR_MUX7_HW_ID>;
				qcom,pre-scaling = <1 1>;
				qcom,ratiometric;
				qcom,hw-settle-time = <200>;
			};

			xo-therm-buf@3c {
				reg = <VADC_LR_MUX3_BUF_XO_THERM>;
				qcom,pre-scaling = <1 1>;
				qcom,ratiometric;
				qcom,hw-settle-time = <200>;
			};
		};

		rtc@6000 {
			compatible = "qcom,pm8941-rtc";
			reg = <0x6000>;
			reg-names = "rtc", "alarm";
			interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
		};

		pm8950_mpps: mpps@a000 {
			compatible = "qcom,pm8950-mpp", "qcom,spmi-mpp";
			reg = <0xa000>;
			gpio-controller;
			gpio-ranges = <&pm8950_mpps 0 0 4>;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};

		pm8950_gpio: gpio@c000 {
			compatible = "qcom,pm8950-gpio", "qcom,spmi-gpio";
			reg = <0xc000>;
			gpio-controller;
			gpio-ranges = <&pm8950_gpio 0 0 8>;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};
	};

	pmic@1 {
		compatible = "qcom,pm8950", "qcom,spmi-pmic";
		reg = <0x1 SPMI_USID>;
		#address-cells = <1>;
		#size-cells = <0>;

		pm8950_spmi_regulators: regulators {
			compatible = "qcom,pm8950-regulators";
		};
	};
};