Commit e0152e74 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'riscv-for-linus-6.6-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V updates from Palmer Dabbelt:

 - Support for the new "riscv,isa-extensions" and "riscv,isa-base"
   device tree interfaces for probing extensions

 - Support for userspace access to the performance counters

 - Support for more instructions in kprobes

 - Crash kernels can be allocated above 4GiB

 - Support for KCFI

 - Support for ELFs in !MMU configurations

 - ARCH_KMALLOC_MINALIGN has been reduced to 8

 - mmap() defaults to sv48-sized addresses, with longer addresses hidden
   behind a hint (similar to Arm and Intel)

 - Also various fixes and cleanups

* tag 'riscv-for-linus-6.6-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (51 commits)
  lib/Kconfig.debug: Restrict DEBUG_INFO_SPLIT for RISC-V
  riscv: support PREEMPT_DYNAMIC with static keys
  riscv: Move create_tmp_mapping() to init sections
  riscv: Mark KASAN tmp* page tables variables as static
  riscv: mm: use bitmap_zero() API
  riscv: enable DEBUG_FORCE_FUNCTION_ALIGN_64B
  riscv: remove redundant mv instructions
  RISC-V: mm: Document mmap changes
  RISC-V: mm: Update pgtable comment documentation
  RISC-V: mm: Add tests for RISC-V mm
  RISC-V: mm: Restrict address space for sv39,sv48,sv57
  riscv: enable DMA_BOUNCE_UNALIGNED_KMALLOC for !dma_coherent
  riscv: allow kmalloc() caches aligned to the smallest value
  riscv: support the elf-fdpic binfmt loader
  binfmt_elf_fdpic: support 64-bit systems
  riscv: Allow CONFIG_CFI_CLANG to be selected
  riscv/purgatory: Disable CFI
  riscv: Add CFI error handling
  riscv: Add ftrace_stub_graph
  riscv: Add types to indirectly called assembly functions
  ...
parents a031eba2 89775a27
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+15 −7
Original line number Diff line number Diff line
@@ -873,7 +873,7 @@
			memory region [offset, offset + size] for that kernel
			image. If '@offset' is omitted, then a suitable offset
			is selected automatically.
			[KNL, X86-64, ARM64] Select a region under 4G first, and
			[KNL, X86-64, ARM64, RISCV] Select a region under 4G first, and
			fall back to reserve region above 4G when '@offset'
			hasn't been specified.
			See Documentation/admin-guide/kdump/kdump.rst for further details.
@@ -886,14 +886,14 @@
			Documentation/admin-guide/kdump/kdump.rst for an example.

	crashkernel=size[KMG],high
			[KNL, X86-64, ARM64] range could be above 4G. Allow kernel
			to allocate physical memory region from top, so could
			be above 4G if system have more than 4G ram installed.
			Otherwise memory region will be allocated below 4G, if
			available.
			[KNL, X86-64, ARM64, RISCV] range could be above 4G.
			Allow kernel to allocate physical memory region from top,
			so could be above 4G if system have more than 4G ram
			installed. Otherwise memory region will be allocated
			below 4G, if available.
			It will be ignored if crashkernel=X is specified.
	crashkernel=size[KMG],low
			[KNL, X86-64, ARM64] range under 4G. When crashkernel=X,high
			[KNL, X86-64, ARM64, RISCV] range under 4G. When crashkernel=X,high
			is passed, kernel could allocate physical memory region
			above 4G, that cause second kernel crash on system
			that require some amount of low memory, e.g. swiotlb
@@ -904,6 +904,7 @@
			size is	platform dependent.
			  --> x86: max(swiotlb_size_or_default() + 8MiB, 256MiB)
			  --> arm64: 128MiB
			  --> riscv: 128MiB
			This one lets the user specify own low range under 4G
			for second kernel instead.
			0: to disable low allocation.
@@ -5554,6 +5555,13 @@
			[KNL] Disable ring 3 MONITOR/MWAIT feature on supported
			CPUs.

	riscv_isa_fallback [RISCV]
			When CONFIG_RISCV_ISA_FALLBACK is not enabled, permit
			falling back to detecting extension support by parsing
			"riscv,isa" property on devicetree systems when the
			replacement properties are not found. See the Kconfig
			entry for RISCV_ISA_FALLBACK.

	ro		[KNL] Mount root device read-only on boot

	rodata=		[KNL]
+23 −4
Original line number Diff line number Diff line
@@ -941,16 +941,35 @@ enabled, otherwise writing to this file will return ``-EBUSY``.
The default value is 8.


perf_user_access (arm64 only)
=================================
perf_user_access (arm64 and riscv only)
=======================================

Controls user space access for reading perf event counters.

Controls user space access for reading perf event counters. When set to 1,
user space can read performance monitor counter registers directly.
arm64
=====

The default value is 0 (access disabled).

When set to 1, user space can read performance monitor counter registers
directly.

See Documentation/arch/arm64/perf.rst for more information.

riscv
=====

When set to 0, user space access is disabled.

The default value is 1, user space can read performance monitor counter
registers through perf, any direct access without perf intervention will trigger
an illegal instruction.

When set to 2, which enables legacy mode (user space has direct access to cycle
and insret CSRs only). Note that this legacy value is deprecated and will be
removed once all user space applications are fixed.

Note that the time CSR is always directly accessible to all modes.

pid_max
=======
+22 −0
Original line number Diff line number Diff line
@@ -133,3 +133,25 @@ RISC-V Linux Kernel SV57
   ffffffff00000000 |  -4     GB | ffffffff7fffffff |    2 GB | modules, BPF
   ffffffff80000000 |  -2     GB | ffffffffffffffff |    2 GB | kernel
  __________________|____________|__________________|_________|____________________________________________________________


Userspace VAs
--------------------
To maintain compatibility with software that relies on the VA space with a
maximum of 48 bits the kernel will, by default, return virtual addresses to
userspace from a 48-bit range (sv48). This default behavior is achieved by
passing 0 into the hint address parameter of mmap. On CPUs with an address space
smaller than sv48, the CPU maximum supported address space will be the default.

Software can "opt-in" to receiving VAs from another VA space by providing
a hint address to mmap. A hint address passed to mmap will cause the largest
address space that fits entirely into the hint to be used, unless there is no
space left in the address space. If there is no space available in the requested
address space, an address in the next smallest available address space will be
returned.

For example, in order to obtain 48-bit VA space, a hint address greater than
:code:`1 << 47` must be provided. Note that this is 47 due to sv48 userspace
ending at :code:`1 << 47` and the addresses beyond this are reserved for the
kernel. Similarly, to obtain 57-bit VA space addresses, a hint address greater
than or equal to :code:`1 << 56` must be provided.
+24 −0
Original line number Diff line number Diff line
@@ -35,6 +35,7 @@ config RISCV
	select ARCH_HAS_SET_MEMORY if MMU
	select ARCH_HAS_STRICT_KERNEL_RWX if MMU && !XIP_KERNEL
	select ARCH_HAS_STRICT_MODULE_RWX if MMU && !XIP_KERNEL
	select ARCH_HAS_SYSCALL_WRAPPER
	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
	select ARCH_HAS_UBSAN_SANITIZE_ALL
	select ARCH_HAS_VDSO_DATA
@@ -42,12 +43,14 @@ config RISCV
	select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT
	select ARCH_STACKWALK
	select ARCH_SUPPORTS_ATOMIC_RMW
	select ARCH_SUPPORTS_CFI_CLANG
	select ARCH_SUPPORTS_DEBUG_PAGEALLOC if MMU
	select ARCH_SUPPORTS_HUGETLBFS if MMU
	select ARCH_SUPPORTS_PAGE_TABLE_CHECK if MMU
	select ARCH_SUPPORTS_PER_VMA_LOCK if MMU
	select ARCH_USE_MEMTEST
	select ARCH_USE_QUEUED_RWLOCKS
	select ARCH_USES_CFI_TRAPS if CFI_CLANG
	select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
	select ARCH_WANT_FRAME_POINTERS
	select ARCH_WANT_GENERAL_HUGETLB if !RISCV_ISA_SVNAPOT
@@ -62,6 +65,7 @@ config RISCV
	select COMMON_CLK
	select CPU_PM if CPU_IDLE || HIBERNATION
	select EDAC_SUPPORT
	select FRAME_POINTER if PERF_EVENTS || (FUNCTION_TRACER && !DYNAMIC_FTRACE)
	select GENERIC_ARCH_TOPOLOGY
	select GENERIC_ATOMIC64 if !64BIT
	select GENERIC_CLOCKEVENTS_BROADCAST if SMP
@@ -130,6 +134,7 @@ config RISCV
	select HAVE_PERF_REGS
	select HAVE_PERF_USER_STACK_DUMP
	select HAVE_POSIX_CPU_TIMERS_TASK_WORK
	select HAVE_PREEMPT_DYNAMIC_KEY if !XIP_KERNEL
	select HAVE_REGS_AND_STACK_ACCESS_API
	select HAVE_RETHOOK if !XIP_KERNEL
	select HAVE_RSEQ
@@ -267,6 +272,7 @@ config RISCV_DMA_NONCOHERENT
	select ARCH_HAS_SETUP_DMA_OPS
	select ARCH_HAS_SYNC_DMA_FOR_CPU
	select ARCH_HAS_SYNC_DMA_FOR_DEVICE
	select DMA_BOUNCE_UNALIGNED_KMALLOC if SWIOTLB
	select DMA_DIRECT_REMAP

config AS_HAS_INSN
@@ -836,6 +842,24 @@ config XIP_PHYS_ADDR
	  be linked for and stored to.  This address is dependent on your
	  own flash usage.

config RISCV_ISA_FALLBACK
	bool "Permit falling back to parsing riscv,isa for extension support by default"
	default y
	help
	  Parsing the "riscv,isa" devicetree property has been deprecated and
	  replaced by a list of explicitly defined strings. For compatibility
	  with existing platforms, the kernel will fall back to parsing the
	  "riscv,isa" property if the replacements are not found.

	  Selecting N here will result in a kernel that does not use the
	  fallback, unless the commandline "riscv_isa_fallback" parameter is
	  present.

	  Please see the dt-binding, located at
	  Documentation/devicetree/bindings/riscv/extensions.yaml for details
	  on the replacement properties, "riscv,isa-base" and
	  "riscv,isa-extensions".

endmenu # "Boot options"

config BUILTIN_DTB
+0 −3
Original line number Diff line number Diff line
@@ -87,9 +87,6 @@ endif
ifeq ($(CONFIG_CMODEL_MEDANY),y)
	KBUILD_CFLAGS += -mcmodel=medany
endif
ifeq ($(CONFIG_PERF_EVENTS),y)
        KBUILD_CFLAGS += -fno-omit-frame-pointer
endif

# Avoid generating .eh_frame sections.
KBUILD_CFLAGS += -fno-asynchronous-unwind-tables -fno-unwind-tables
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