Commit e003d533 authored by Catalin Marinas's avatar Catalin Marinas
Browse files

Merge branch 'for-next/sysreg-gen' into for-next/core 

* for-next/sysreg-gen: (32 commits)
  : Automatic system register definition generation.
  arm64/sysreg: Generate definitions for FAR_ELx
  arm64/sysreg: Generate definitions for DACR32_EL2
  arm64/sysreg: Generate definitions for CSSELR_EL1
  arm64/sysreg: Generate definitions for CPACR_ELx
  arm64/sysreg: Generate definitions for CONTEXTIDR_ELx
  arm64/sysreg: Generate definitions for CLIDR_EL1
  arm64/sve: Generate ZCR definitions
  arm64/sme: Generate defintions for SVCR
  arm64/sme: Generate SMPRI_EL1 definitions
  arm64/sme: Automatically generate SMPRIMAP_EL2 definitions
  arm64/sme: Automatically generate SMIDR_EL1 defines
  arm64/sme: Automatically generate defines for SMCR
  arm64/sysreg: Support generation of RAZ fields
  arm64/sme: Remove _EL0 from name of SVCR - FIXME sysreg.h
  arm64/sme: Standardise bitfield names for SVCR
  arm64/sme: Drop SYS_ from SMIDR_EL1 defines
  arm64/fp: Rename SVE and SME LEN field name to _WIDTH
  arm64/fp: Make SVE and SME length register definition match architecture
  arm64/sysreg: fix odd line spacing
  arm64/sysreg: improve comment for regs without fields
  ...
parents 201729d5 dffdeade

arch/arm64/include/asm/Kbuild

+1 −0
Original line number Diff line number Diff line
@@ -7,3 +7,4 @@ generic-y += parport.h 
generic-y += user.h



generated-y += cpucaps.h

generated-y += sysreg-defs.h

arch/arm64/include/asm/archrandom.h

+1 −1
Original line number Diff line number Diff line
@@ -142,7 +142,7 @@ static inline bool __init __early_cpu_has_rndr(void) 
{

	/* Open code as we run prior to the first call to cpufeature. */

	unsigned long ftr = read_sysreg_s(SYS_ID_AA64ISAR0_EL1);

	return (ftr >> ID_AA64ISAR0_RNDR_SHIFT) & 0xf;

	return (ftr >> ID_AA64ISAR0_EL1_RNDR_SHIFT) & 0xf;

}



static inline bool __init __must_check

arch/arm64/include/asm/el2_setup.h

+1 −1
Original line number Diff line number Diff line
@@ -171,7 +171,7 @@ 
	msr_s	SYS_SMCR_EL2, x1		// length for EL1.



	mrs_s	x1, SYS_SMIDR_EL1		// Priority mapping supported?

	ubfx    x1, x1, #SYS_SMIDR_EL1_SMPS_SHIFT, #1

	ubfx    x1, x1, #SMIDR_EL1_SMPS_SHIFT, #1

	cbz     x1, .Lskip_sme_\@



	msr_s	SYS_SMPRIMAP_EL2, xzr		// Make all priorities equal

arch/arm64/include/asm/fpsimd.h

+2 −2
Original line number Diff line number Diff line
@@ -67,12 +67,12 @@ extern void fpsimd_save_and_flush_cpu_state(void); 


static inline bool thread_sm_enabled(struct thread_struct *thread)

{

	return system_supports_sme() && (thread->svcr & SYS_SVCR_EL0_SM_MASK);

	return system_supports_sme() && (thread->svcr & SVCR_SM_MASK);

}



static inline bool thread_za_enabled(struct thread_struct *thread)

{

	return system_supports_sme() && (thread->svcr & SYS_SVCR_EL0_ZA_MASK);

	return system_supports_sme() && (thread->svcr & SVCR_ZA_MASK);

}



/* Maximum VL that SVE/SME VL-agnostic software can transparently support */

arch/arm64/include/asm/processor.h

+1 −1
Original line number Diff line number Diff line
@@ -192,7 +192,7 @@ static inline unsigned int thread_get_sme_vl(struct thread_struct *thread) 


static inline unsigned int thread_get_cur_vl(struct thread_struct *thread)

{

	if (system_supports_sme() && (thread->svcr & SYS_SVCR_EL0_SM_MASK))

	if (system_supports_sme() && (thread->svcr & SVCR_SM_MASK))

		return thread_get_sme_vl(thread);

	else

		return thread_get_sve_vl(thread);