Commit df74bd50 authored by Borislav Petkov (AMD)'s avatar Borislav Petkov (AMD) Committed by Wenkuan Wang
Browse files

x86/CPU/AMD: Get rid of amd_erratum_400[] 

mainline inclusion
from mainline-v6.8-rc1
commit b3ffbbd282d4eb79f489853a171242c2a06bd8b8
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I96RWV


CVE: NA

--------------------------------

Setting X86_BUG_AMD_E400 in init_amd() is early enough.

No functional changes.

Signed-off-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: default avatarNikolay Borisov <nik.borisov@suse.com>
Link: http://lore.kernel.org/r/20231120104152.13740-12-bp@alien8.de


Signed-off-by: default avatarWenkuan Wang <Wenkuan.Wang@amd.com>
parent b95f063e

arch/x86/kernel/cpu/amd.c

+20 −13
Original line number Diff line number Diff line
@@ -59,10 +59,6 @@ static u32 nodes_per_socket = 1; 
#define AMD_MODEL_RANGE_START(range)	(((range) >> 12) & 0xfff)

#define AMD_MODEL_RANGE_END(range)	((range) & 0xfff)



static const int amd_erratum_400[] =

	AMD_OSVW_ERRATUM(1, AMD_MODEL_RANGE(0xf, 0x41, 0x2, 0xff, 0xf),

			    AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0xff, 0xf));



static const int amd_erratum_1485[] =

	AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x19, 0x10, 0x0, 0x1f, 0xf),

			   AMD_MODEL_RANGE(0x19, 0x60, 0x0, 0xaf, 0xf));
@@ -769,15 +765,6 @@ static void early_init_amd(struct cpuinfo_x86 *c) 
	if (c->x86 == 0x16 && c->x86_model <= 0xf)

		msr_set_bit(MSR_AMD64_LS_CFG, 15);



	/*

	 * Check whether the machine is affected by erratum 400. This is

	 * used to select the proper idle routine and to enable the check

	 * whether the machine is affected in arch_post_acpi_init(), which

	 * sets the X86_BUG_AMD_APIC_C1E bug depending on the MSR check.

	 */

	if (cpu_has_amd_erratum(c, amd_erratum_400))

		set_cpu_bug(c, X86_BUG_AMD_E400);



	early_detect_mem_encrypt(c);



	/* Re-enable TopologyExtensions if switched off by BIOS */
@@ -844,6 +831,16 @@ static void init_amd_k8(struct cpuinfo_x86 *c) 
	msr_set_bit(MSR_K7_HWCR, 6);

#endif

	set_cpu_bug(c, X86_BUG_SWAPGS_FENCE);



	/*

	 * Check models and steppings affected by erratum 400. This is

	 * used to select the proper idle routine and to enable the

	 * check whether the machine is affected in arch_post_acpi_subsys_init()

	 * which sets the X86_BUG_AMD_APIC_C1E bug depending on the MSR check.

	 */

	if (c->x86_model > 0x41 ||

	    (c->x86_model == 0x41 && c->x86_stepping >= 0x2))

		setup_force_cpu_bug(X86_BUG_AMD_E400);

}



static void init_amd_gh(struct cpuinfo_x86 *c)
@@ -878,6 +875,16 @@ static void init_amd_gh(struct cpuinfo_x86 *c) 
	msr_clear_bit(MSR_AMD64_BU_CFG2, 24);



	set_cpu_bug(c, X86_BUG_AMD_TLB_MMATCH);



	/*

	 * Check models and steppings affected by erratum 400. This is

	 * used to select the proper idle routine and to enable the

	 * check whether the machine is affected in arch_post_acpi_subsys_init()

	 * which sets the X86_BUG_AMD_APIC_C1E bug depending on the MSR check.

	 */

	if (c->x86_model > 0x2 ||

	    (c->x86_model == 0x2 && c->x86_stepping >= 0x1))

		setup_force_cpu_bug(X86_BUG_AMD_E400);

}



static void init_amd_ln(struct cpuinfo_x86 *c)