Commit df5c1883 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'mips-fixes_5.15_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux 

Pull MIPS fix from Thomas Bogendoerfer:
 "Revert workaround for buggy cpu detection because regressions"

* tag 'mips-fixes_5.15_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux:
  MIPS: Revert "add support for buggy MT7621S core detection"
parents 9e1ff307 740da9d7

arch/mips/include/asm/mips-cps.h

+1 −22
Original line number Diff line number Diff line
@@ -10,8 +10,6 @@ 
#include <linux/io.h>

#include <linux/types.h>



#include <asm/mips-boards/launch.h>



extern unsigned long __cps_access_bad_size(void)

	__compiletime_error("Bad size for CPS accessor");
@@ -167,30 +165,11 @@ static inline uint64_t mips_cps_cluster_config(unsigned int cluster) 
 */

static inline unsigned int mips_cps_numcores(unsigned int cluster)

{

	unsigned int ncores;



	if (!mips_cm_present())

		return 0;



	/* Add one before masking to handle 0xff indicating no cores */

	ncores = (mips_cps_cluster_config(cluster) + 1) & CM_GCR_CONFIG_PCORES;



	if (IS_ENABLED(CONFIG_SOC_MT7621)) {

		struct cpulaunch *launch;



		/*

		 * Ralink MT7621S SoC is single core, but the GCR_CONFIG method

		 * always reports 2 cores. Check the second core's LAUNCH_FREADY

		 * flag to detect if the second core is missing. This method

		 * only works before the core has been started.

		 */

		launch = (struct cpulaunch *)CKSEG0ADDR(CPULAUNCH);

		launch += 2; /* MT7621 has 2 VPEs per core */

		if (!(launch->flags & LAUNCH_FREADY))

			ncores = 1;

	}



	return ncores;

	return (mips_cps_cluster_config(cluster) + 1) & CM_GCR_CONFIG_PCORES;

}



/**