Commit df412c35 authored by Linus Walleij's avatar Linus Walleij
Browse files

ARM: ixp4xx: Delete GTWX5715 board files 



This board is replaced with the corresponding device tree.

Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 6dc9b80c

arch/arm/mach-ixp4xx/Kconfig

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@@ -60,24 +60,6 @@ config CPU_IXP43X 
	depends on MACH_KIXRP435

	default y



config MACH_GTWX5715

	bool "Gemtek WX5715 (Linksys WRV54G)"

	depends on ARCH_IXP4XX

	depends on IXP4XX_PCI_LEGACY

	help

		This board is currently inside the Linksys WRV54G Gateways.



		IXP425 - 266mhz

		32mb SDRAM

		8mb Flash

		miniPCI slot 0 does not have a card connector soldered to the board

		miniPCI slot 1 has an ISL3880 802.11g card (Prism54)

		npe0 is connected to a Kendin KS8995M Switch (4 ports)

		npe1 is the "wan" port

		"Console" UART is available on J11 as console

		"High Speed" UART is n/c (as far as I can tell)

		20 Pin ARM/Xscale JTAG interface on J2



comment "IXP4xx Options"



config IXP4XX_PCI_LEGACY

arch/arm/mach-ixp4xx/Makefile

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@@ -9,13 +9,11 @@ obj-pci-n := 
# Device tree platform

obj-pci-$(CONFIG_MACH_IXP4XX_OF)	+= ixp4xx-of.o



obj-pci-$(CONFIG_MACH_GTWX5715)		+= gtwx5715-pci.o

obj-pci-$(CONFIG_MACH_GATEWAY7001)	+= gateway7001-pci.o

obj-pci-$(CONFIG_MACH_FSG)		+= fsg-pci.o



obj-y	+= common.o



obj-$(CONFIG_MACH_GTWX5715)	+= gtwx5715-setup.o

obj-$(CONFIG_MACH_GATEWAY7001)	+= gateway7001-setup.o

obj-$(CONFIG_MACH_FSG)		+= fsg-setup.o

obj-$(CONFIG_MACH_GORAMO_MLR)	+= goramo_mlr.o

arch/arm/mach-ixp4xx/gtwx5715-pci.c

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// SPDX-License-Identifier: GPL-2.0-or-later

/*

 * arch/arm/mach-ixp4xx/gtwx5715-pci.c

 *

 * Gemtek GTWX5715 (Linksys WRV54G) board setup

 *

 * Copyright (C) 2004 George T. Joseph

 * Derived from Coyote

 */



#include <linux/pci.h>

#include <linux/init.h>

#include <linux/delay.h>

#include <linux/irq.h>

#include <asm/mach-types.h>

#include <mach/hardware.h>

#include <asm/mach/pci.h>



#include "irqs.h"



#define SLOT0_DEVID	0

#define SLOT1_DEVID	1

#define INTA		10 /* slot 1 has INTA and INTB crossed */

#define INTB		11



/*

 * Slot 0 isn't actually populated with a card connector but

 * we initialize it anyway in case a future version has the

 * slot populated or someone with good soldering skills has

 * some free time.

 */

void __init gtwx5715_pci_preinit(void)

{

	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);

	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);

	ixp4xx_pci_preinit();

}





static int __init gtwx5715_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)

{

	int rc = -1;



	if ((slot == SLOT0_DEVID && pin == 1) ||

	    (slot == SLOT1_DEVID && pin == 2))

		rc = IXP4XX_GPIO_IRQ(INTA);

	else if ((slot == SLOT0_DEVID && pin == 2) ||

		 (slot == SLOT1_DEVID && pin == 1))

		rc = IXP4XX_GPIO_IRQ(INTB);



	printk(KERN_INFO "%s: Mapped slot %d pin %d to IRQ %d\n",

	       __func__, slot, pin, rc);

	return rc;

}



struct hw_pci gtwx5715_pci __initdata = {

	.nr_controllers = 1,

	.ops		= &ixp4xx_ops,

	.preinit =        gtwx5715_pci_preinit,

	.setup =          ixp4xx_setup,

	.map_irq =        gtwx5715_map_irq,

};



int __init gtwx5715_pci_init(void)

{

	if (machine_is_gtwx5715())

		pci_common_init(&gtwx5715_pci);



	return 0;

}



subsys_initcall(gtwx5715_pci_init);

arch/arm/mach-ixp4xx/gtwx5715-setup.c

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// SPDX-License-Identifier: GPL-2.0-or-later

/*

 * arch/arm/mach-ixp4xx/gtwx5715-setup.c

 *

 * Gemtek GTWX5715 (Linksys WRV54G) board setup

 *

 * Copyright (C) 2004 George T. Joseph

 * Derived from Coyote

 */



#include <linux/init.h>

#include <linux/device.h>

#include <linux/serial.h>

#include <linux/tty.h>

#include <linux/serial_8250.h>

#include <asm/types.h>

#include <asm/setup.h>

#include <asm/memory.h>

#include <mach/hardware.h>

#include <asm/irq.h>

#include <asm/mach-types.h>

#include <asm/mach/arch.h>

#include <asm/mach/flash.h>



#include "irqs.h"



/* GPIO 5,6,7 and 12 are hard wired to the Kendin KS8995M Switch

   and operate as an SPI type interface.  The details of the interface

   are available on Kendin/Micrel's web site. */



#define GTWX5715_KSSPI_SELECT	5

#define GTWX5715_KSSPI_TXD	6

#define GTWX5715_KSSPI_CLOCK	7

#define GTWX5715_KSSPI_RXD	12



/* The "reset" button is wired to GPIO 3.

   The GPIO is brought "low" when the button is pushed. */



#define GTWX5715_BUTTON_GPIO	3



/* Board Label      Front Label

   LED1             Power

   LED2             Wireless-G

   LED3             not populated but could be

   LED4             Internet

   LED5 - LED8      Controlled by KS8995M Switch

   LED9             DMZ */



#define GTWX5715_LED1_GPIO	2

#define GTWX5715_LED2_GPIO	9

#define GTWX5715_LED3_GPIO	8

#define GTWX5715_LED4_GPIO	1

#define GTWX5715_LED9_GPIO	4



/*

 * Xscale UART registers are 32 bits wide with only the least

 * significant 8 bits having any meaning.  From a configuration

 * perspective, this means 2 things...

 *

 *   Setting .regshift = 2 so that the standard 16550 registers

 *   line up on every 4th byte.

 *

 *   Shifting the register start virtual address +3 bytes when

 *   compiled big-endian.  Since register writes are done on a

 *   single byte basis, if the shift isn't done the driver will

 *   write the value into the most significant byte of the register,

 *   which is ignored, instead of the least significant.

 */



#ifdef	__ARMEB__

#define	REG_OFFSET	3

#else

#define	REG_OFFSET	0

#endif



/*

 * Only the second or "console" uart is connected on the gtwx5715.

 */



static struct resource gtwx5715_uart_resources[] = {

	{

		.start	= IXP4XX_UART2_BASE_PHYS,

		.end	= IXP4XX_UART2_BASE_PHYS + 0x0fff,

		.flags	= IORESOURCE_MEM,

	},

	{

		.start	= IRQ_IXP4XX_UART2,

		.end	= IRQ_IXP4XX_UART2,

		.flags	= IORESOURCE_IRQ,

	},

	{ },

};





static struct plat_serial8250_port gtwx5715_uart_platform_data[] = {

	{

	.mapbase	= IXP4XX_UART2_BASE_PHYS,

	.membase	= (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,

	.irq		= IRQ_IXP4XX_UART2,

	.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,

	.iotype		= UPIO_MEM,

	.regshift	= 2,

	.uartclk	= IXP4XX_UART_XTAL,

	},

	{ },

};



static struct platform_device gtwx5715_uart_device = {

	.name		= "serial8250",

	.id		= PLAT8250_DEV_PLATFORM,

	.dev			= {

		.platform_data	= gtwx5715_uart_platform_data,

	},

	.num_resources	= 2,

	.resource	= gtwx5715_uart_resources,

};



static struct flash_platform_data gtwx5715_flash_data = {

	.map_name	= "cfi_probe",

	.width		= 2,

};



static struct resource gtwx5715_flash_resource = {

	.flags		= IORESOURCE_MEM,

};



static struct platform_device gtwx5715_flash = {

	.name		= "IXP4XX-Flash",

	.id		= 0,

	.dev		= {

		.platform_data = &gtwx5715_flash_data,

	},

	.num_resources	= 1,

	.resource	= &gtwx5715_flash_resource,

};



static struct platform_device *gtwx5715_devices[] __initdata = {

	&gtwx5715_uart_device,

	&gtwx5715_flash,

};



static void __init gtwx5715_init(void)

{

	ixp4xx_sys_init();



	gtwx5715_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);

	gtwx5715_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_8M - 1;



	platform_add_devices(gtwx5715_devices, ARRAY_SIZE(gtwx5715_devices));

}





MACHINE_START(GTWX5715, "Gemtek GTWX5715 (Linksys WRV54G)")

	/* Maintainer: George Joseph */

	.map_io		= ixp4xx_map_io,

	.init_early	= ixp4xx_init_early,

	.init_irq	= ixp4xx_init_irq,

	.init_time	= ixp4xx_timer_init,

	.atag_offset	= 0x100,

	.init_machine	= gtwx5715_init,

#if defined(CONFIG_PCI)

	.dma_zone_size	= SZ_64M,

#endif

	.restart	= ixp4xx_restart,

MACHINE_END