Commit df38990d authored by Andy Shevchenko's avatar Andy Shevchenko
Browse files

pinctrl: cherryview: make irq_chip immutable



Since recently, the kernel is nagging about mutable irq_chips:

   "not an immutable chip, please consider fixing it!"

Drop the unneeded copy, flag it as IRQCHIP_IMMUTABLE, add the new
helper functions and call the appropriate gpiolib functions.

While at it, switch to use hwirq variable instead of pin for
the sake of consistency.

Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: default avatarMika Westerberg <mika.westerberg@linux.intel.com>
parent 6d209b42
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+38 −27
Original line number Diff line number Diff line
@@ -1242,12 +1242,12 @@ static void chv_gpio_irq_ack(struct irq_data *d)
{
	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
	struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
	int pin = irqd_to_hwirq(d);
	irq_hw_number_t hwirq = irqd_to_hwirq(d);
	u32 intr_line;

	raw_spin_lock(&chv_lock);

	intr_line = chv_readl(pctrl, pin, CHV_PADCTRL0);
	intr_line = chv_readl(pctrl, hwirq, CHV_PADCTRL0);
	intr_line &= CHV_PADCTRL0_INTSEL_MASK;
	intr_line >>= CHV_PADCTRL0_INTSEL_SHIFT;
	chv_pctrl_writel(pctrl, CHV_INTSTAT, BIT(intr_line));
@@ -1255,17 +1255,16 @@ static void chv_gpio_irq_ack(struct irq_data *d)
	raw_spin_unlock(&chv_lock);
}

static void chv_gpio_irq_mask_unmask(struct irq_data *d, bool mask)
static void chv_gpio_irq_mask_unmask(struct irq_data *d, irq_hw_number_t hwirq, bool mask)
{
	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
	struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
	int pin = irqd_to_hwirq(d);
	u32 value, intr_line;
	unsigned long flags;

	raw_spin_lock_irqsave(&chv_lock, flags);

	intr_line = chv_readl(pctrl, pin, CHV_PADCTRL0);
	intr_line = chv_readl(pctrl, hwirq, CHV_PADCTRL0);
	intr_line &= CHV_PADCTRL0_INTSEL_MASK;
	intr_line >>= CHV_PADCTRL0_INTSEL_SHIFT;

@@ -1281,12 +1280,20 @@ static void chv_gpio_irq_mask_unmask(struct irq_data *d, bool mask)

static void chv_gpio_irq_mask(struct irq_data *d)
{
	chv_gpio_irq_mask_unmask(d, true);
	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
	irq_hw_number_t hwirq = irqd_to_hwirq(d);

	chv_gpio_irq_mask_unmask(d, hwirq, true);
	gpiochip_disable_irq(gc, hwirq);
}

static void chv_gpio_irq_unmask(struct irq_data *d)
{
	chv_gpio_irq_mask_unmask(d, false);
	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
	irq_hw_number_t hwirq = irqd_to_hwirq(d);

	gpiochip_enable_irq(gc, hwirq);
	chv_gpio_irq_mask_unmask(d, hwirq, false);
}

static unsigned chv_gpio_irq_startup(struct irq_data *d)
@@ -1306,17 +1313,17 @@ static unsigned chv_gpio_irq_startup(struct irq_data *d)
		struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
		struct device *dev = pctrl->dev;
		struct intel_community_context *cctx = &pctrl->context.communities[0];
		unsigned int pin = irqd_to_hwirq(d);
		irq_hw_number_t hwirq = irqd_to_hwirq(d);
		irq_flow_handler_t handler;
		unsigned long flags;
		u32 intsel, value;

		raw_spin_lock_irqsave(&chv_lock, flags);
		intsel = chv_readl(pctrl, pin, CHV_PADCTRL0);
		intsel = chv_readl(pctrl, hwirq, CHV_PADCTRL0);
		intsel &= CHV_PADCTRL0_INTSEL_MASK;
		intsel >>= CHV_PADCTRL0_INTSEL_SHIFT;

		value = chv_readl(pctrl, pin, CHV_PADCTRL1);
		value = chv_readl(pctrl, hwirq, CHV_PADCTRL1);
		if (value & CHV_PADCTRL1_INTWAKECFG_LEVEL)
			handler = handle_level_irq;
		else
@@ -1324,9 +1331,9 @@ static unsigned chv_gpio_irq_startup(struct irq_data *d)

		if (cctx->intr_lines[intsel] == CHV_INVALID_HWIRQ) {
			irq_set_handler_locked(d, handler);
			dev_dbg(dev, "using interrupt line %u for IRQ_TYPE_NONE on pin %u\n",
				intsel, pin);
			cctx->intr_lines[intsel] = pin;
			dev_dbg(dev, "using interrupt line %u for IRQ_TYPE_NONE on pin %lu\n",
				intsel, hwirq);
			cctx->intr_lines[intsel] = hwirq;
		}
		raw_spin_unlock_irqrestore(&chv_lock, flags);
	}
@@ -1392,14 +1399,14 @@ static int chv_gpio_irq_type(struct irq_data *d, unsigned int type)
{
	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
	struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
	unsigned int pin = irqd_to_hwirq(d);
	irq_hw_number_t hwirq = irqd_to_hwirq(d);
	unsigned long flags;
	u32 value;
	int ret;

	raw_spin_lock_irqsave(&chv_lock, flags);

	ret = chv_gpio_set_intr_line(pctrl, pin);
	ret = chv_gpio_set_intr_line(pctrl, hwirq);
	if (ret)
		goto out_unlock;

@@ -1416,8 +1423,8 @@ static int chv_gpio_irq_type(struct irq_data *d, unsigned int type)
	 * 2. If the pin cfg is not locked in BIOS:
	 *	Driver programs the IntWakeCfg bits and save the mapping.
	 */
	if (!chv_pad_locked(pctrl, pin)) {
		value = chv_readl(pctrl, pin, CHV_PADCTRL1);
	if (!chv_pad_locked(pctrl, hwirq)) {
		value = chv_readl(pctrl, hwirq, CHV_PADCTRL1);
		value &= ~CHV_PADCTRL1_INTWAKECFG_MASK;
		value &= ~CHV_PADCTRL1_INVRXTX_MASK;

@@ -1434,7 +1441,7 @@ static int chv_gpio_irq_type(struct irq_data *d, unsigned int type)
				value |= CHV_PADCTRL1_INVRXTX_RXDATA;
		}

		chv_writel(pctrl, pin, CHV_PADCTRL1, value);
		chv_writel(pctrl, hwirq, CHV_PADCTRL1, value);
	}

	if (type & IRQ_TYPE_EDGE_BOTH)
@@ -1448,6 +1455,17 @@ static int chv_gpio_irq_type(struct irq_data *d, unsigned int type)
	return ret;
}

static const struct irq_chip chv_gpio_irq_chip = {
	.name		= "chv-gpio",
	.irq_startup	= chv_gpio_irq_startup,
	.irq_ack	= chv_gpio_irq_ack,
	.irq_mask	= chv_gpio_irq_mask,
	.irq_unmask	= chv_gpio_irq_unmask,
	.irq_set_type	= chv_gpio_irq_type,
	.flags		= IRQCHIP_SKIP_SET_WAKE | IRQCHIP_IMMUTABLE,
	GPIOCHIP_IRQ_RESOURCE_HELPERS,
};

static void chv_gpio_irq_handler(struct irq_desc *desc)
{
	struct gpio_chip *gc = irq_desc_get_handler_data(desc);
@@ -1611,15 +1629,8 @@ static int chv_gpio_probe(struct intel_pinctrl *pctrl, int irq)
	chip->base = -1;

	pctrl->irq = irq;
	pctrl->irqchip.name = "chv-gpio";
	pctrl->irqchip.irq_startup = chv_gpio_irq_startup;
	pctrl->irqchip.irq_ack = chv_gpio_irq_ack;
	pctrl->irqchip.irq_mask = chv_gpio_irq_mask;
	pctrl->irqchip.irq_unmask = chv_gpio_irq_unmask;
	pctrl->irqchip.irq_set_type = chv_gpio_irq_type;
	pctrl->irqchip.flags = IRQCHIP_SKIP_SET_WAKE;

	chip->irq.chip = &pctrl->irqchip;

	gpio_irq_chip_set_chip(&chip->irq, &chv_gpio_irq_chip);
	chip->irq.init_hw = chv_gpio_irq_init_hw;
	chip->irq.parent_handler = chv_gpio_irq_handler;
	chip->irq.num_parents = 1;