Commit df254d45 authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Merge branch '1GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue 

Tony Nguyen says:

====================
Intel Wired LAN Driver Updates 2022-07-14

This series contains updates to e1000e and igc drivers.

Sasha re-enables GPT clock when exiting s0ix to prevent hardware unit
hang and reverts a workaround for this issue on e1000e.

Lennert Buytenhek restores checks for removed device while accessing
registers to prevent NULL pointer dereferences for igc.

* '1GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue:
  igc: Reinstate IGC_REMOVED logic and implement it properly
  Revert "e1000e: Fix possible HW unit hang after an s0ix exit"
  e1000e: Enable GPT clock before sending message to CSME
====================

Link: https://lore.kernel.org/r/20220714175857.933537-1-anthony.l.nguyen@intel.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents a14bd747 7c1ddcee

drivers/net/ethernet/intel/e1000e/hw.h

+0 −1
Original line number Diff line number Diff line
@@ -630,7 +630,6 @@ struct e1000_phy_info { 
	bool disable_polarity_correction;

	bool is_mdix;

	bool polarity_correction;

	bool reset_disable;

	bool speed_downgraded;

	bool autoneg_wait_to_complete;

};

drivers/net/ethernet/intel/e1000e/ich8lan.c

+0 −4
Original line number Diff line number Diff line
@@ -2050,10 +2050,6 @@ static s32 e1000_check_reset_block_ich8lan(struct e1000_hw *hw) 
	bool blocked = false;

	int i = 0;



	/* Check the PHY (LCD) reset flag */

	if (hw->phy.reset_disable)

		return true;



	while ((blocked = !(er32(FWSM) & E1000_ICH_FWSM_RSPCIPHY)) &&

	       (i++ < 30))

		usleep_range(10000, 11000);

drivers/net/ethernet/intel/e1000e/ich8lan.h

+0 −1
Original line number Diff line number Diff line
@@ -271,7 +271,6 @@ 
#define I217_CGFREG_ENABLE_MTA_RESET	0x0002

#define I217_MEMPWR			PHY_REG(772, 26)

#define I217_MEMPWR_DISABLE_SMB_RELEASE	0x0010

#define I217_MEMPWR_MOEM		0x1000



/* Receive Address Initial CRC Calculation */

#define E1000_PCH_RAICC(_n)	(0x05F50 + ((_n) * 4))

drivers/net/ethernet/intel/e1000e/netdev.c

+4 −26
Original line number Diff line number Diff line
@@ -6494,6 +6494,10 @@ static void e1000e_s0ix_exit_flow(struct e1000_adapter *adapter) 


	if (er32(FWSM) & E1000_ICH_FWSM_FW_VALID &&

	    hw->mac.type >= e1000_pch_adp) {

		/* Keep the GPT clock enabled for CSME */

		mac_data = er32(FEXTNVM);

		mac_data |= BIT(3);

		ew32(FEXTNVM, mac_data);

		/* Request ME unconfigure the device from S0ix */

		mac_data = er32(H2ME);

		mac_data &= ~E1000_H2ME_START_DPG;
@@ -6987,21 +6991,8 @@ static __maybe_unused int e1000e_pm_suspend(struct device *dev) 
	struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));

	struct e1000_adapter *adapter = netdev_priv(netdev);

	struct pci_dev *pdev = to_pci_dev(dev);

	struct e1000_hw *hw = &adapter->hw;

	u16 phy_data;

	int rc;



	if (er32(FWSM) & E1000_ICH_FWSM_FW_VALID &&

	    hw->mac.type >= e1000_pch_adp) {

		/* Mask OEM Bits / Gig Disable / Restart AN (772_26[12] = 1) */

		e1e_rphy(hw, I217_MEMPWR, &phy_data);

		phy_data |= I217_MEMPWR_MOEM;

		e1e_wphy(hw, I217_MEMPWR, phy_data);



		/* Disable LCD reset */

		hw->phy.reset_disable = true;

	}



	e1000e_flush_lpic(pdev);



	e1000e_pm_freeze(dev);
@@ -7023,8 +7014,6 @@ static __maybe_unused int e1000e_pm_resume(struct device *dev) 
	struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));

	struct e1000_adapter *adapter = netdev_priv(netdev);

	struct pci_dev *pdev = to_pci_dev(dev);

	struct e1000_hw *hw = &adapter->hw;

	u16 phy_data;

	int rc;



	/* Introduce S0ix implementation */
@@ -7035,17 +7024,6 @@ static __maybe_unused int e1000e_pm_resume(struct device *dev) 
	if (rc)

		return rc;



	if (er32(FWSM) & E1000_ICH_FWSM_FW_VALID &&

	    hw->mac.type >= e1000_pch_adp) {

		/* Unmask OEM Bits / Gig Disable / Restart AN 772_26[12] = 0 */

		e1e_rphy(hw, I217_MEMPWR, &phy_data);

		phy_data &= ~I217_MEMPWR_MOEM;

		e1e_wphy(hw, I217_MEMPWR, phy_data);



		/* Enable LCD reset */

		hw->phy.reset_disable = false;

	}



	return e1000e_pm_thaw(dev);

}

drivers/net/ethernet/intel/igc/igc_main.c

+3 −0
Original line number Diff line number Diff line
@@ -6171,6 +6171,9 @@ u32 igc_rd32(struct igc_hw *hw, u32 reg) 
	u8 __iomem *hw_addr = READ_ONCE(hw->hw_addr);

	u32 value = 0;



	if (IGC_REMOVED(hw_addr))

		return ~value;



	value = readl(&hw_addr[reg]);



	/* reads should not return all F's */