Commit defa2e54 authored by Andrew Lunn's avatar Andrew Lunn Committed by Jakub Kicinski
Browse files

net: dsa: mt7530: Separate C22 and C45 MDIO bus transactions 



mt7530 does support C45, but its uses a mix of registering its MDIO
bus and providing its private MDIO bus to the DSA core, too. This makes
the change a bit more complex.

Signed-off-by: default avatarAndrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarMichael Walle <michael@walle.cc>
Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 860edff5

drivers/net/dsa/mt7530.c

+44 −43
Original line number Diff line number Diff line
@@ -608,17 +608,29 @@ mt7530_mib_reset(struct dsa_switch *ds) 
	mt7530_write(priv, MT7530_MIB_CCR, CCR_MIB_ACTIVATE);

}



static int mt7530_phy_read(struct mt7530_priv *priv, int port, int regnum)

static int mt7530_phy_read_c22(struct mt7530_priv *priv, int port, int regnum)

{

	return mdiobus_read_nested(priv->bus, port, regnum);

}



static int mt7530_phy_write(struct mt7530_priv *priv, int port, int regnum,

static int mt7530_phy_write_c22(struct mt7530_priv *priv, int port, int regnum,

				u16 val)

{

	return mdiobus_write_nested(priv->bus, port, regnum, val);

}



static int mt7530_phy_read_c45(struct mt7530_priv *priv, int port,

			       int devad, int regnum)

{

	return mdiobus_c45_read_nested(priv->bus, port, devad, regnum);

}



static int mt7530_phy_write_c45(struct mt7530_priv *priv, int port, int devad,

				int regnum, u16 val)

{

	return mdiobus_c45_write_nested(priv->bus, port, devad, regnum, val);

}



static int

mt7531_ind_c45_phy_read(struct mt7530_priv *priv, int port, int devad,

			int regnum)
@@ -670,7 +682,7 @@ mt7531_ind_c45_phy_read(struct mt7530_priv *priv, int port, int devad, 


static int

mt7531_ind_c45_phy_write(struct mt7530_priv *priv, int port, int devad,

			 int regnum, u32 data)

			 int regnum, u16 data)

{

	struct mii_bus *bus = priv->bus;

	struct mt7530_dummy_poll p;
@@ -793,55 +805,36 @@ mt7531_ind_c22_phy_write(struct mt7530_priv *priv, int port, int regnum, 
}



static int

mt7531_ind_phy_read(struct mt7530_priv *priv, int port, int regnum)

mt753x_phy_read_c22(struct mii_bus *bus, int port, int regnum)

{

	int devad;

	int ret;

	struct mt7530_priv *priv = bus->priv;



	if (regnum & MII_ADDR_C45) {

		devad = (regnum >> MII_DEVADDR_C45_SHIFT) & 0x1f;

		ret = mt7531_ind_c45_phy_read(priv, port, devad,

					      regnum & MII_REGADDR_C45_MASK);

	} else {

		ret = mt7531_ind_c22_phy_read(priv, port, regnum);

	}



	return ret;

	return priv->info->phy_read_c22(priv, port, regnum);

}



static int

mt7531_ind_phy_write(struct mt7530_priv *priv, int port, int regnum,

		     u16 data)

mt753x_phy_read_c45(struct mii_bus *bus, int port, int devad, int regnum)

{

	int devad;

	int ret;



	if (regnum & MII_ADDR_C45) {

		devad = (regnum >> MII_DEVADDR_C45_SHIFT) & 0x1f;

		ret = mt7531_ind_c45_phy_write(priv, port, devad,

					       regnum & MII_REGADDR_C45_MASK,

					       data);

	} else {

		ret = mt7531_ind_c22_phy_write(priv, port, regnum, data);

	}

	struct mt7530_priv *priv = bus->priv;



	return ret;

	return priv->info->phy_read_c45(priv, port, devad, regnum);

}



static int

mt753x_phy_read(struct mii_bus *bus, int port, int regnum)

mt753x_phy_write_c22(struct mii_bus *bus, int port, int regnum, u16 val)

{

	struct mt7530_priv *priv = bus->priv;



	return priv->info->phy_read(priv, port, regnum);

	return priv->info->phy_write_c22(priv, port, regnum, val);

}



static int

mt753x_phy_write(struct mii_bus *bus, int port, int regnum, u16 val)

mt753x_phy_write_c45(struct mii_bus *bus, int port, int devad, int regnum,

		     u16 val)

{

	struct mt7530_priv *priv = bus->priv;



	return priv->info->phy_write(priv, port, regnum, val);

	return priv->info->phy_write_c45(priv, port, devad, regnum, val);

}



static void
@@ -2086,8 +2079,10 @@ mt7530_setup_mdio(struct mt7530_priv *priv) 
	bus->priv = priv;

	bus->name = KBUILD_MODNAME "-mii";

	snprintf(bus->id, MII_BUS_ID_SIZE, KBUILD_MODNAME "-%d", idx++);

	bus->read = mt753x_phy_read;

	bus->write = mt753x_phy_write;

	bus->read = mt753x_phy_read_c22;

	bus->write = mt753x_phy_write_c22;

	bus->read_c45 = mt753x_phy_read_c45;

	bus->write_c45 = mt753x_phy_write_c45;

	bus->parent = dev;

	bus->phy_mask = ~ds->phys_mii_mask;
@@ -3182,8 +3177,10 @@ static const struct mt753x_info mt753x_table[] = { 
		.id = ID_MT7621,

		.pcs_ops = &mt7530_pcs_ops,

		.sw_setup = mt7530_setup,

		.phy_read = mt7530_phy_read,

		.phy_write = mt7530_phy_write,

		.phy_read_c22 = mt7530_phy_read_c22,

		.phy_write_c22 = mt7530_phy_write_c22,

		.phy_read_c45 = mt7530_phy_read_c45,

		.phy_write_c45 = mt7530_phy_write_c45,

		.pad_setup = mt7530_pad_clk_setup,

		.mac_port_get_caps = mt7530_mac_port_get_caps,

		.mac_port_config = mt7530_mac_config,
@@ -3192,8 +3189,10 @@ static const struct mt753x_info mt753x_table[] = { 
		.id = ID_MT7530,

		.pcs_ops = &mt7530_pcs_ops,

		.sw_setup = mt7530_setup,

		.phy_read = mt7530_phy_read,

		.phy_write = mt7530_phy_write,

		.phy_read_c22 = mt7530_phy_read_c22,

		.phy_write_c22 = mt7530_phy_write_c22,

		.phy_read_c45 = mt7530_phy_read_c45,

		.phy_write_c45 = mt7530_phy_write_c45,

		.pad_setup = mt7530_pad_clk_setup,

		.mac_port_get_caps = mt7530_mac_port_get_caps,

		.mac_port_config = mt7530_mac_config,
@@ -3202,8 +3201,10 @@ static const struct mt753x_info mt753x_table[] = { 
		.id = ID_MT7531,

		.pcs_ops = &mt7531_pcs_ops,

		.sw_setup = mt7531_setup,

		.phy_read = mt7531_ind_phy_read,

		.phy_write = mt7531_ind_phy_write,

		.phy_read_c22 = mt7531_ind_c22_phy_read,

		.phy_write_c22 = mt7531_ind_c22_phy_write,

		.phy_read_c45 = mt7531_ind_c45_phy_read,

		.phy_write_c45 = mt7531_ind_c45_phy_write,

		.pad_setup = mt7531_pad_setup,

		.cpu_port_config = mt7531_cpu_port_config,

		.mac_port_get_caps = mt7531_mac_port_get_caps,
@@ -3263,7 +3264,7 @@ mt7530_probe(struct mdio_device *mdiodev) 
	 * properly.

	 */

	if (!priv->info->sw_setup || !priv->info->pad_setup ||

	    !priv->info->phy_read || !priv->info->phy_write ||

	    !priv->info->phy_read_c22 || !priv->info->phy_write_c22 ||

	    !priv->info->mac_port_get_caps ||

	    !priv->info->mac_port_config)

		return -EINVAL;

drivers/net/dsa/mt7530.h

+11 −4
Original line number Diff line number Diff line
@@ -750,8 +750,10 @@ struct mt753x_pcs { 
/* struct mt753x_info -	This is the main data structure for holding the specific

 *			part for each supported device

 * @sw_setup:		Holding the handler to a device initialization

 * @phy_read:		Holding the way reading PHY port

 * @phy_write:		Holding the way writing PHY port

 * @phy_read_c22:	Holding the way reading PHY port using C22

 * @phy_write_c22:	Holding the way writing PHY port using C22

 * @phy_read_c45:	Holding the way reading PHY port using C45

 * @phy_write_c45:	Holding the way writing PHY port using C45

 * @pad_setup:		Holding the way setting up the bus pad for a certain

 *			MAC port

 * @phy_mode_supported:	Check if the PHY type is being supported on a certain
@@ -767,8 +769,13 @@ struct mt753x_info { 
	const struct phylink_pcs_ops *pcs_ops;



	int (*sw_setup)(struct dsa_switch *ds);

	int (*phy_read)(struct mt7530_priv *priv, int port, int regnum);

	int (*phy_write)(struct mt7530_priv *priv, int port, int regnum, u16 val);

	int (*phy_read_c22)(struct mt7530_priv *priv, int port, int regnum);

	int (*phy_write_c22)(struct mt7530_priv *priv, int port, int regnum,

			     u16 val);

	int (*phy_read_c45)(struct mt7530_priv *priv, int port, int devad,

			    int regnum);

	int (*phy_write_c45)(struct mt7530_priv *priv, int port, int devad,

			     int regnum, u16 val);

	int (*pad_setup)(struct dsa_switch *ds, phy_interface_t interface);

	int (*cpu_port_config)(struct dsa_switch *ds, int port);

	void (*mac_port_get_caps)(struct dsa_switch *ds, int port,