Commit dede211f authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge tag 'clk-imx-6.3' of...

Merge tag 'clk-imx-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/abelvesa/linux into clk-imx

Pull i.MX clk driver updates from Abel Vesa:

 - Free the imx_uart_clocks even if imx_register_uart_clocks returns early
 - Get the stdout clocks count from device tree
 - Drop the clock count argument from imx_register_uart_clocks.
 - Keep the uart clocks on i.MX93 for when earlycon is used
 - Fix SPDX comment in i.MX6SLL clocks bindings header
 - Drop some unnecessary spaces from i.MX8ULP clocks bindings header
 - Add a new clk-gpr-mux clock type and use it on i.MX6Q to add ENET ref
   clocks
 - Add the imx_obtain_fixed_of_clock for allowing to add a clock that is
   not configured via devicetree
 - Fix the ENET1 gate configuration for i.MX6UL according to the
   reference manual
 - Add ENET refclock mux support for i.MX6UL

* tag 'clk-imx-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/abelvesa/linux:
  clk: imx6ul: add ethernet refclock mux support
  clk: imx6ul: fix enet1 gate configuration
  clk: imx: add imx_obtain_fixed_of_clock()
  clk: imx6q: add ethernet refclock mux support
  clk: imx: add clk-gpr-mux driver
  dt-bindings: imx8ulp: clock: no spaces before tabs
  clk: imx6sll: add proper spdx license identifier
  clk: imx: imx93: invoke imx_register_uart_clocks
  clk: imx: remove clk_count of imx_register_uart_clocks
  clk: imx: get stdout clk count from device tree
  clk: imx: avoid memory leak
parents 1b929c02 4e197ee8
Loading
Loading
Loading
Loading
+1 −0
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@ mxc-clk-objs += clk-pllv3.o
mxc-clk-objs += clk-pllv4.o
mxc-clk-objs += clk-pll14xx.o
mxc-clk-objs += clk-sscg-pll.o
mxc-clk-objs += clk-gpr-mux.o
obj-$(CONFIG_MXC_CLK) += mxc-clk.o

obj-$(CONFIG_CLK_IMX8MM) += clk-imx8mm.o
+119 −0
Original line number Diff line number Diff line
// SPDX-License-Identifier: GPL-2.0
/*
 */

#define pr_fmt(fmt) "imx:clk-gpr-mux: " fmt

#include <linux/module.h>

#include <linux/clk-provider.h>
#include <linux/errno.h>
#include <linux/export.h>
#include <linux/io.h>
#include <linux/slab.h>
#include <linux/regmap.h>
#include <linux/mfd/syscon.h>

#include "clk.h"

struct imx_clk_gpr {
	struct clk_hw hw;
	struct regmap *regmap;
	u32 mask;
	u32 reg;
	const u32 *mux_table;
};

static struct imx_clk_gpr *to_imx_clk_gpr(struct clk_hw *hw)
{
	return container_of(hw, struct imx_clk_gpr, hw);
}

static u8 imx_clk_gpr_mux_get_parent(struct clk_hw *hw)
{
	struct imx_clk_gpr *priv = to_imx_clk_gpr(hw);
	unsigned int val;
	int ret;

	ret = regmap_read(priv->regmap, priv->reg, &val);
	if (ret)
		goto get_parent_err;

	val &= priv->mask;

	ret = clk_mux_val_to_index(hw, priv->mux_table, 0, val);
	if (ret < 0)
		goto get_parent_err;

	return ret;

get_parent_err:
	pr_err("failed to get parent (%pe)\n", ERR_PTR(ret));

	/* return some realistic non negative value. Potentially we could
	 * give index to some dummy error parent.
	 */
	return 0;
}

static int imx_clk_gpr_mux_set_parent(struct clk_hw *hw, u8 index)
{
	struct imx_clk_gpr *priv = to_imx_clk_gpr(hw);
	unsigned int val = clk_mux_index_to_val(priv->mux_table, 0, index);

	return regmap_update_bits(priv->regmap, priv->reg, priv->mask, val);
}

static int imx_clk_gpr_mux_determine_rate(struct clk_hw *hw,
					 struct clk_rate_request *req)
{
	return clk_mux_determine_rate_flags(hw, req, 0);
}

const struct clk_ops imx_clk_gpr_mux_ops = {
	.get_parent = imx_clk_gpr_mux_get_parent,
	.set_parent = imx_clk_gpr_mux_set_parent,
	.determine_rate = imx_clk_gpr_mux_determine_rate,
};

struct clk_hw *imx_clk_gpr_mux(const char *name, const char *compatible,
			       u32 reg, const char **parent_names,
			       u8 num_parents, const u32 *mux_table, u32 mask)
{
	struct clk_init_data init  = { };
	struct imx_clk_gpr *priv;
	struct regmap *regmap;
	struct clk_hw *hw;
	int ret;

	regmap = syscon_regmap_lookup_by_compatible(compatible);
	if (IS_ERR(regmap)) {
		pr_err("failed to find %s regmap\n", compatible);
		return ERR_CAST(regmap);
	}

	priv = kzalloc(sizeof(*priv), GFP_KERNEL);
	if (!priv)
		return ERR_PTR(-ENOMEM);

	init.name = name;
	init.ops = &imx_clk_gpr_mux_ops;
	init.parent_names = parent_names;
	init.num_parents = num_parents;
	init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE;

	priv->hw.init = &init;
	priv->regmap = regmap;
	priv->mux_table = mux_table;
	priv->reg = reg;
	priv->mask = mask;

	hw = &priv->hw;
	ret = clk_hw_register(NULL, &priv->hw);
	if (ret) {
		kfree(priv);
		hw = ERR_PTR(ret);
	}

	return hw;
}
+1 −1
Original line number Diff line number Diff line
@@ -218,7 +218,7 @@ static int __init __mx25_clocks_init(void __iomem *ccm_base)
	 */
	clk_set_parent(clk[cko_sel], clk[ipg]);

	imx_register_uart_clocks(6);
	imx_register_uart_clocks();

	return 0;
}
+1 −1
Original line number Diff line number Diff line
@@ -165,7 +165,7 @@ static void __init _mx27_clocks_init(unsigned long fref)

	clk_prepare_enable(clk[IMX27_CLK_EMI_AHB_GATE]);

	imx_register_uart_clocks(7);
	imx_register_uart_clocks();

	imx_print_silicon_rev("i.MX27", mx27_revision());
}
+1 −1
Original line number Diff line number Diff line
@@ -235,7 +235,7 @@ static void __init _mx35_clocks_init(void)
	 */
	clk_prepare_enable(clk[scc_gate]);

	imx_register_uart_clocks(4);
	imx_register_uart_clocks();

	imx_print_silicon_rev("i.MX35", mx35_revision());
}
Loading