Commit de89b2e4 authored by Chengming Gui's avatar Chengming Gui Committed by Alex Deucher
Browse files

drm/amdkfd: Support navy_flounder KFD 



Add KFD support for Navy Flounder.

Signed-off-by: default avatarChengming Gui <Jack.Gui@amd.com>
Reviewed-by: default avatarTao Zhou <tao.zhou1@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent f081e697

drivers/gpu/drm/amd/amdkfd/kfd_crat.c

+1 −0
Original line number Diff line number Diff line
@@ -679,6 +679,7 @@ static int kfd_fill_gpu_cache_info(struct kfd_dev *kdev, 
	case CHIP_NAVI12:

	case CHIP_NAVI14:

	case CHIP_SIENNA_CICHLID:

	case CHIP_NAVY_FLOUNDER:

		pcache_info = navi10_cache_info;

		num_of_cache_types = ARRAY_SIZE(navi10_cache_info);

		break;

drivers/gpu/drm/amd/amdkfd/kfd_device.c

+19 −0
Original line number Diff line number Diff line
@@ -478,6 +478,24 @@ static const struct kfd_device_info sienna_cichlid_device_info = { 
	.num_sdma_queues_per_engine = 8,

};



static const struct kfd_device_info navy_flounder_device_info = {

	.asic_family = CHIP_NAVY_FLOUNDER,

	.asic_name = "navy_flounder",

	.max_pasid_bits = 16,

	.max_no_of_hqd  = 24,

	.doorbell_size  = 8,

	.ih_ring_entry_size = 8 * sizeof(uint32_t),

	.event_interrupt_class = &event_interrupt_class_v9,

	.num_of_watch_points = 4,

	.mqd_size_aligned = MQD_SIZE_ALIGNED,

	.needs_iommu_device = false,

	.supports_cwsr = true,

	.needs_pci_atomics = false,

	.num_sdma_engines = 2,

	.num_xgmi_sdma_engines = 0,

	.num_sdma_queues_per_engine = 8,

};



/* For each entry, [0] is regular and [1] is virtualisation device. */

static const struct kfd_device_info *kfd_supported_devices[][2] = {

#ifdef KFD_SUPPORT_IOMMU_V2
@@ -501,6 +519,7 @@ static const struct kfd_device_info *kfd_supported_devices[][2] = { 
	[CHIP_NAVI12] = {&navi12_device_info, &navi12_device_info},

	[CHIP_NAVI14] = {&navi14_device_info, NULL},

	[CHIP_SIENNA_CICHLID] = {&sienna_cichlid_device_info, &sienna_cichlid_device_info},

	[CHIP_NAVY_FLOUNDER] = {&navy_flounder_device_info, &navy_flounder_device_info},

};



static int kfd_gtt_sa_init(struct kfd_dev *kfd, unsigned int buf_size,

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

+1 −0
Original line number Diff line number Diff line
@@ -1939,6 +1939,7 @@ struct device_queue_manager *device_queue_manager_init(struct kfd_dev *dev) 
	case CHIP_NAVI12:

	case CHIP_NAVI14:

	case CHIP_SIENNA_CICHLID:

	case CHIP_NAVY_FLOUNDER:

		device_queue_manager_init_v10_navi10(&dqm->asic_ops);

		break;

	default:

drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c

+1 −0
Original line number Diff line number Diff line
@@ -416,6 +416,7 @@ int kfd_init_apertures(struct kfd_process *process) 
			case CHIP_NAVI12:

			case CHIP_NAVI14:

			case CHIP_SIENNA_CICHLID:

			case CHIP_NAVY_FLOUNDER:

				kfd_init_apertures_v9(pdd, id);

				break;

			default:

drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c

+1 −0
Original line number Diff line number Diff line
@@ -246,6 +246,7 @@ int pm_init(struct packet_manager *pm, struct device_queue_manager *dqm) 
	case CHIP_NAVI12:

	case CHIP_NAVI14:

	case CHIP_SIENNA_CICHLID:

	case CHIP_NAVY_FLOUNDER:

		pm->pmf = &kfd_v9_pm_funcs;

		break;

	default: