Commit de58cee8 authored by Fabien Parent's avatar Fabien Parent Committed by Lee Jones
Browse files

mfd: mt6397-core: Add MT6357 PMIC support 



Adds support for PMIC keys, Regulator, and RTC for the MT6357 PMIC.

Signed-off-by: default avatarFabien Parent <fparent@baylibre.com>
Signed-off-by: default avatarLee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20220531124959.202787-5-fparent@baylibre.com
parent 52298ec3

drivers/mfd/mt6397-core.c

+44 −0
Original line number Diff line number Diff line
@@ -12,10 +12,12 @@ 
#include <linux/regmap.h>

#include <linux/mfd/core.h>

#include <linux/mfd/mt6323/core.h>

#include <linux/mfd/mt6357/core.h>

#include <linux/mfd/mt6358/core.h>

#include <linux/mfd/mt6359/core.h>

#include <linux/mfd/mt6397/core.h>

#include <linux/mfd/mt6323/registers.h>

#include <linux/mfd/mt6357/registers.h>

#include <linux/mfd/mt6358/registers.h>

#include <linux/mfd/mt6359/registers.h>

#include <linux/mfd/mt6397/registers.h>
@@ -23,6 +25,9 @@ 
#define MT6323_RTC_BASE		0x8000

#define MT6323_RTC_SIZE		0x40



#define MT6357_RTC_BASE		0x0588

#define MT6357_RTC_SIZE		0x3c



#define MT6358_RTC_BASE		0x0588

#define MT6358_RTC_SIZE		0x3c
@@ -37,6 +42,11 @@ static const struct resource mt6323_rtc_resources[] = { 
	DEFINE_RES_IRQ(MT6323_IRQ_STATUS_RTC),

};



static const struct resource mt6357_rtc_resources[] = {

	DEFINE_RES_MEM(MT6357_RTC_BASE, MT6357_RTC_SIZE),

	DEFINE_RES_IRQ(MT6357_IRQ_RTC),

};



static const struct resource mt6358_rtc_resources[] = {

	DEFINE_RES_MEM(MT6358_RTC_BASE, MT6358_RTC_SIZE),

	DEFINE_RES_IRQ(MT6358_IRQ_RTC),
@@ -66,6 +76,13 @@ static const struct resource mt6323_keys_resources[] = { 
	DEFINE_RES_IRQ_NAMED(MT6323_IRQ_STATUS_FCHRKEY, "homekey"),

};



static const struct resource mt6357_keys_resources[] = {

	DEFINE_RES_IRQ_NAMED(MT6357_IRQ_PWRKEY, "powerkey"),

	DEFINE_RES_IRQ_NAMED(MT6357_IRQ_HOMEKEY, "homekey"),

	DEFINE_RES_IRQ_NAMED(MT6357_IRQ_PWRKEY_R, "powerkey_r"),

	DEFINE_RES_IRQ_NAMED(MT6357_IRQ_HOMEKEY_R, "homekey_r"),

};



static const struct resource mt6397_keys_resources[] = {

	DEFINE_RES_IRQ_NAMED(MT6397_IRQ_PWRKEY, "powerkey"),

	DEFINE_RES_IRQ_NAMED(MT6397_IRQ_HOMEKEY, "homekey"),
@@ -100,6 +117,22 @@ static const struct mfd_cell mt6323_devs[] = { 
	},

};



static const struct mfd_cell mt6357_devs[] = {

	{

		.name = "mt6357-regulator",

	}, {

		.name = "mt6357-rtc",

		.num_resources = ARRAY_SIZE(mt6357_rtc_resources),

		.resources = mt6357_rtc_resources,

		.of_compatible = "mediatek,mt6357-rtc",

	}, {

		.name = "mtk-pmic-keys",

		.num_resources = ARRAY_SIZE(mt6357_keys_resources),

		.resources = mt6357_keys_resources,

		.of_compatible = "mediatek,mt6357-keys"

	},

};



static const struct mfd_cell mt6358_devs[] = {

	{

		.name = "mt6358-regulator",
@@ -179,6 +212,14 @@ static const struct chip_data mt6323_core = { 
	.irq_init = mt6397_irq_init,

};



static const struct chip_data mt6357_core = {

	.cid_addr = MT6357_SWCID,

	.cid_shift = 8,

	.cells = mt6357_devs,

	.cell_size = ARRAY_SIZE(mt6357_devs),

	.irq_init = mt6358_irq_init,

};



static const struct chip_data mt6358_core = {

	.cid_addr = MT6358_SWCID,

	.cid_shift = 8,
@@ -261,6 +302,9 @@ static const struct of_device_id mt6397_of_match[] = { 
	{

		.compatible = "mediatek,mt6323",

		.data = &mt6323_core,

	}, {

		.compatible = "mediatek,mt6357",

		.data = &mt6357_core,

	}, {

		.compatible = "mediatek,mt6358",

		.data = &mt6358_core,

include/linux/mfd/mt6357/core.h

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+119 −0
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/* SPDX-License-Identifier: GPL-2.0-only */

/*

 * Copyright (c) 2022 BayLibre, SAS

 * Author: Fabien Parent <fparent@baylibre.com>

 */



#ifndef __MFD_MT6357_CORE_H__

#define __MFD_MT6357_CORE_H__



enum mt6357_irq_top_status_shift {

	MT6357_BUCK_TOP = 0,

	MT6357_LDO_TOP,

	MT6357_PSC_TOP,

	MT6357_SCK_TOP,

	MT6357_BM_TOP,

	MT6357_HK_TOP,

	MT6357_XPP_TOP,

	MT6357_AUD_TOP,

	MT6357_MISC_TOP,

};



enum mt6357_irq_numbers {

	MT6357_IRQ_VPROC_OC = 0,

	MT6357_IRQ_VCORE_OC,

	MT6357_IRQ_VMODEM_OC,

	MT6357_IRQ_VS1_OC,

	MT6357_IRQ_VPA_OC,

	MT6357_IRQ_VCORE_PREOC,

	MT6357_IRQ_VFE28_OC = 16,

	MT6357_IRQ_VXO22_OC,

	MT6357_IRQ_VRF18_OC,

	MT6357_IRQ_VRF12_OC,

	MT6357_IRQ_VEFUSE_OC,

	MT6357_IRQ_VCN33_OC,

	MT6357_IRQ_VCN28_OC,

	MT6357_IRQ_VCN18_OC,

	MT6357_IRQ_VCAMA_OC,

	MT6357_IRQ_VCAMD_OC,

	MT6357_IRQ_VCAMIO_OC,

	MT6357_IRQ_VLDO28_OC,

	MT6357_IRQ_VUSB33_OC,

	MT6357_IRQ_VAUX18_OC,

	MT6357_IRQ_VAUD28_OC,

	MT6357_IRQ_VIO28_OC,

	MT6357_IRQ_VIO18_OC,

	MT6357_IRQ_VSRAM_PROC_OC,

	MT6357_IRQ_VSRAM_OTHERS_OC,

	MT6357_IRQ_VIBR_OC,

	MT6357_IRQ_VDRAM_OC,

	MT6357_IRQ_VMC_OC,

	MT6357_IRQ_VMCH_OC,

	MT6357_IRQ_VEMC_OC,

	MT6357_IRQ_VSIM1_OC,

	MT6357_IRQ_VSIM2_OC,

	MT6357_IRQ_PWRKEY = 48,

	MT6357_IRQ_HOMEKEY,

	MT6357_IRQ_PWRKEY_R,

	MT6357_IRQ_HOMEKEY_R,

	MT6357_IRQ_NI_LBAT_INT,

	MT6357_IRQ_CHRDET,

	MT6357_IRQ_CHRDET_EDGE,

	MT6357_IRQ_VCDT_HV_DET,

	MT6357_IRQ_WATCHDOG,

	MT6357_IRQ_VBATON_UNDET,

	MT6357_IRQ_BVALID_DET,

	MT6357_IRQ_OV,

	MT6357_IRQ_RTC = 64,

	MT6357_IRQ_FG_BAT0_H = 80,

	MT6357_IRQ_FG_BAT0_L,

	MT6357_IRQ_FG_CUR_H,

	MT6357_IRQ_FG_CUR_L,

	MT6357_IRQ_FG_ZCV,

	MT6357_IRQ_BATON_LV = 96,

	MT6357_IRQ_BATON_HT,

	MT6357_IRQ_BAT_H = 112,

	MT6357_IRQ_BAT_L,

	MT6357_IRQ_AUXADC_IMP,

	MT6357_IRQ_NAG_C_DLTV,

	MT6357_IRQ_AUDIO = 128,

	MT6357_IRQ_ACCDET = 133,

	MT6357_IRQ_ACCDET_EINT0,

	MT6357_IRQ_ACCDET_EINT1,

	MT6357_IRQ_SPI_CMD_ALERT = 144,

	MT6357_IRQ_NR,

};



#define MT6357_IRQ_BUCK_BASE	MT6357_IRQ_VPROC_OC

#define MT6357_IRQ_LDO_BASE	MT6357_IRQ_VFE28_OC

#define MT6357_IRQ_PSC_BASE	MT6357_IRQ_PWRKEY

#define MT6357_IRQ_SCK_BASE	MT6357_IRQ_RTC

#define MT6357_IRQ_BM_BASE	MT6357_IRQ_FG_BAT0_H

#define MT6357_IRQ_HK_BASE	MT6357_IRQ_BAT_H

#define MT6357_IRQ_AUD_BASE	MT6357_IRQ_AUDIO

#define MT6357_IRQ_MISC_BASE	MT6357_IRQ_SPI_CMD_ALERT



#define MT6357_IRQ_BUCK_BITS (MT6357_IRQ_VCORE_PREOC - MT6357_IRQ_BUCK_BASE + 1)

#define MT6357_IRQ_LDO_BITS (MT6357_IRQ_VSIM2_OC - MT6357_IRQ_LDO_BASE + 1)

#define MT6357_IRQ_PSC_BITS (MT6357_IRQ_VCDT_HV_DET - MT6357_IRQ_PSC_BASE + 1)

#define MT6357_IRQ_SCK_BITS (MT6357_IRQ_RTC - MT6357_IRQ_SCK_BASE + 1)

#define MT6357_IRQ_BM_BITS (MT6357_IRQ_BATON_HT - MT6357_IRQ_BM_BASE + 1)

#define MT6357_IRQ_HK_BITS (MT6357_IRQ_NAG_C_DLTV - MT6357_IRQ_HK_BASE + 1)

#define MT6357_IRQ_AUD_BITS (MT6357_IRQ_ACCDET_EINT1 - MT6357_IRQ_AUD_BASE + 1)

#define MT6357_IRQ_MISC_BITS	\

	(MT6357_IRQ_SPI_CMD_ALERT - MT6357_IRQ_MISC_BASE + 1)



#define MT6357_TOP_GEN(sp)	\

{	\

	.hwirq_base = MT6357_IRQ_##sp##_BASE,	\

	.num_int_regs =	\

		((MT6357_IRQ_##sp##_BITS - 1) /	\

		MTK_PMIC_REG_WIDTH) + 1,	\

	.en_reg = MT6357_##sp##_TOP_INT_CON0,	\

	.en_reg_shift = 0x6,	\

	.sta_reg = MT6357_##sp##_TOP_INT_STATUS0,	\

	.sta_reg_shift = 0x2,	\

	.top_offset = MT6357_##sp##_TOP,	\

}



#endif /* __MFD_MT6357_CORE_H__ */

include/linux/mfd/mt6357/registers.h

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