Commit de511df7 authored by Jani Nikula's avatar Jani Nikula
Browse files

drm/i915: move structs from intel_display_power.h to .c 



Anything internal to the implementation should be hidden away. Move the
intel_display_power structs to the .c file.

Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Reviewed-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: default avatarImre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211116171434.20516-4-jani.nikula@intel.com
parent 6abf2fc0

drivers/gpu/drm/i915/display/intel_display_power.c

+92 −0
Original line number Diff line number Diff line
@@ -24,6 +24,98 @@ 
#include "intel_vga.h"

#include "vlv_sideband.h"



struct i915_power_well_ops {

	/*

	 * Synchronize the well's hw state to match the current sw state, for

	 * example enable/disable it based on the current refcount. Called

	 * during driver init and resume time, possibly after first calling

	 * the enable/disable handlers.

	 */

	void (*sync_hw)(struct drm_i915_private *dev_priv,

			struct i915_power_well *power_well);

	/*

	 * Enable the well and resources that depend on it (for example

	 * interrupts located on the well). Called after the 0->1 refcount

	 * transition.

	 */

	void (*enable)(struct drm_i915_private *dev_priv,

		       struct i915_power_well *power_well);

	/*

	 * Disable the well and resources that depend on it. Called after

	 * the 1->0 refcount transition.

	 */

	void (*disable)(struct drm_i915_private *dev_priv,

			struct i915_power_well *power_well);

	/* Returns the hw enabled state. */

	bool (*is_enabled)(struct drm_i915_private *dev_priv,

			   struct i915_power_well *power_well);

};



struct i915_power_well_regs {

	i915_reg_t bios;

	i915_reg_t driver;

	i915_reg_t kvmr;

	i915_reg_t debug;

};



/* Power well structure for haswell */

struct i915_power_well_desc {

	const char *name;

	bool always_on;

	u64 domains;

	/* unique identifier for this power well */

	enum i915_power_well_id id;

	/*

	 * Arbitraty data associated with this power well. Platform and power

	 * well specific.

	 */

	union {

		struct {

			/*

			 * request/status flag index in the PUNIT power well

			 * control/status registers.

			 */

			u8 idx;

		} vlv;

		struct {

			enum dpio_phy phy;

		} bxt;

		struct {

			const struct i915_power_well_regs *regs;

			/*

			 * request/status flag index in the power well

			 * constrol/status registers.

			 */

			u8 idx;

			/* Mask of pipes whose IRQ logic is backed by the pw */

			u8 irq_pipe_mask;

			/*

			 * Instead of waiting for the status bit to ack enables,

			 * just wait a specific amount of time and then consider

			 * the well enabled.

			 */

			u16 fixed_enable_delay;

			/* The pw is backing the VGA functionality */

			bool has_vga:1;

			bool has_fuses:1;

			/*

			 * The pw is for an ICL+ TypeC PHY port in

			 * Thunderbolt mode.

			 */

			bool is_tc_tbt:1;

		} hsw;

	};

	const struct i915_power_well_ops *ops;

};



struct i915_power_well {

	const struct i915_power_well_desc *desc;

	/* power well enable/disable usage count */

	int count;

	/* cached hw enabled state */

	bool hw_enabled;

};



bool intel_display_power_well_is_enabled(struct drm_i915_private *dev_priv,

					 enum i915_power_well_id power_well_id);

drivers/gpu/drm/i915/display/intel_display_power.h

+1 −94
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@ 
#include "i915_reg.h"



struct drm_i915_private;

struct i915_power_well;

struct intel_encoder;



enum intel_display_power_domain {
@@ -155,100 +156,6 @@ enum i915_power_well_id { 
	((tran) == TRANSCODER_EDP ? POWER_DOMAIN_TRANSCODER_EDP : \

	 (tran) + POWER_DOMAIN_TRANSCODER_A)



struct i915_power_well;



struct i915_power_well_ops {

	/*

	 * Synchronize the well's hw state to match the current sw state, for

	 * example enable/disable it based on the current refcount. Called

	 * during driver init and resume time, possibly after first calling

	 * the enable/disable handlers.

	 */

	void (*sync_hw)(struct drm_i915_private *dev_priv,

			struct i915_power_well *power_well);

	/*

	 * Enable the well and resources that depend on it (for example

	 * interrupts located on the well). Called after the 0->1 refcount

	 * transition.

	 */

	void (*enable)(struct drm_i915_private *dev_priv,

		       struct i915_power_well *power_well);

	/*

	 * Disable the well and resources that depend on it. Called after

	 * the 1->0 refcount transition.

	 */

	void (*disable)(struct drm_i915_private *dev_priv,

			struct i915_power_well *power_well);

	/* Returns the hw enabled state. */

	bool (*is_enabled)(struct drm_i915_private *dev_priv,

			   struct i915_power_well *power_well);

};



struct i915_power_well_regs {

	i915_reg_t bios;

	i915_reg_t driver;

	i915_reg_t kvmr;

	i915_reg_t debug;

};



/* Power well structure for haswell */

struct i915_power_well_desc {

	const char *name;

	bool always_on;

	u64 domains;

	/* unique identifier for this power well */

	enum i915_power_well_id id;

	/*

	 * Arbitraty data associated with this power well. Platform and power

	 * well specific.

	 */

	union {

		struct {

			/*

			 * request/status flag index in the PUNIT power well

			 * control/status registers.

			 */

			u8 idx;

		} vlv;

		struct {

			enum dpio_phy phy;

		} bxt;

		struct {

			const struct i915_power_well_regs *regs;

			/*

			 * request/status flag index in the power well

			 * constrol/status registers.

			 */

			u8 idx;

			/* Mask of pipes whose IRQ logic is backed by the pw */

			u8 irq_pipe_mask;

			/*

			 * Instead of waiting for the status bit to ack enables,

			 * just wait a specific amount of time and then consider

			 * the well enabled.

			 */

			u16 fixed_enable_delay;

			/* The pw is backing the VGA functionality */

			bool has_vga:1;

			bool has_fuses:1;

			/*

			 * The pw is for an ICL+ TypeC PHY port in

			 * Thunderbolt mode.

			 */

			bool is_tc_tbt:1;

		} hsw;

	};

	const struct i915_power_well_ops *ops;

};



struct i915_power_well {

	const struct i915_power_well_desc *desc;

	/* power well enable/disable usage count */

	int count;

	/* cached hw enabled state */

	bool hw_enabled;

};



struct i915_power_domains {

	/*

	 * Power wells needed for initialization at driver init and suspend