Commit dda4fb85 authored by Aurabindo Pillai's avatar Aurabindo Pillai Committed by Alex Deucher
Browse files

drm/amd/display: DML changes for DCN32/321 



DML is required for display configuration modelling for things like
bandwidth management and validation.

Signed-off-by: default avatarAurabindo Pillai <aurabindo.pillai@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 58efeea3

drivers/gpu/drm/amd/display/dc/dml/Makefile

+7 −0
Original line number Diff line number Diff line
@@ -72,6 +72,9 @@ CFLAGS_$(AMDDALPATH)/dc/dml/dcn30/display_rq_dlg_calc_30.o := $(dml_ccflags) 
CFLAGS_$(AMDDALPATH)/dc/dml/dcn31/display_mode_vba_31.o := $(dml_ccflags) $(frame_warn_flag)

CFLAGS_$(AMDDALPATH)/dc/dml/dcn31/display_rq_dlg_calc_31.o := $(dml_ccflags)

CFLAGS_$(AMDDALPATH)/dc/dml/dcn30/dcn30_fpu.o := $(dml_ccflags)

CFLAGS_$(AMDDALPATH)/dc/dml/dcn32/display_mode_vba_32.o := $(dml_ccflags) $(frame_warn_flag)

CFLAGS_$(AMDDALPATH)/dc/dml/dcn32/display_rq_dlg_calc_32.o := $(dml_ccflags)

CFLAGS_$(AMDDALPATH)/dc/dml/dcn32/display_mode_vba_util_32.o := $(dml_ccflags)

CFLAGS_$(AMDDALPATH)/dc/dml/dcn31/dcn31_fpu.o := $(dml_ccflags)

CFLAGS_$(AMDDALPATH)/dc/dml/dcn301/dcn301_fpu.o := $(dml_ccflags)

CFLAGS_$(AMDDALPATH)/dc/dml/dcn302/dcn302_fpu.o := $(dml_ccflags)
@@ -93,6 +96,9 @@ CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml/dcn30/display_mode_vba_30.o := $(dml_rcflags) 
CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml/dcn30/display_rq_dlg_calc_30.o := $(dml_rcflags)

CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml/dcn31/display_mode_vba_31.o := $(dml_rcflags)

CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml/dcn31/display_rq_dlg_calc_31.o := $(dml_rcflags)

CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml/dcn32/display_mode_vba_32.o := $(dml_rcflags)

CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml/dcn32/display_rq_dlg_calc_32.o := $(dml_rcflags)

CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml/dcn32/display_mode_vba_util_32.o := $(dml_rcflags)

CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml/dcn301/dcn301_fpu.o := $(dml_rcflags)

CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml/display_mode_lib.o := $(dml_rcflags)

CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml/dsc/rc_calc_fpu.o  := $(dml_rcflags)
@@ -116,6 +122,7 @@ DML += dcn20/display_rq_dlg_calc_20v2.o dcn20/display_mode_vba_20v2.o 
DML += dcn21/display_rq_dlg_calc_21.o dcn21/display_mode_vba_21.o

DML += dcn30/dcn30_fpu.o dcn30/display_mode_vba_30.o dcn30/display_rq_dlg_calc_30.o

DML += dcn31/display_mode_vba_31.o dcn31/display_rq_dlg_calc_31.o

DML += dcn32/display_mode_vba_32.o dcn32/display_rq_dlg_calc_32.o dcn32/display_mode_vba_util_32.o

DML += dcn31/dcn31_fpu.o

DML += dcn301/dcn301_fpu.o

DML += dcn302/dcn302_fpu.o

drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c

+4 −4
Original line number Diff line number Diff line
@@ -438,8 +438,8 @@ static void UseMinimumDCFCLK( 
		int dpte_group_bytes[],

		double PrefetchLinesY[][2][DC__NUM_DPP__MAX],

		double PrefetchLinesC[][2][DC__NUM_DPP__MAX],

		int swath_width_luma_ub_all_states[][2][DC__NUM_DPP__MAX],

		int swath_width_chroma_ub_all_states[][2][DC__NUM_DPP__MAX],

		unsigned int swath_width_luma_ub_all_states[][2][DC__NUM_DPP__MAX],

		unsigned int swath_width_chroma_ub_all_states[][2][DC__NUM_DPP__MAX],

		int BytePerPixelY[],

		int BytePerPixelC[],

		int HTotal[],
@@ -6696,8 +6696,8 @@ static void UseMinimumDCFCLK( 
		int dpte_group_bytes[],

		double PrefetchLinesY[][2][DC__NUM_DPP__MAX],

		double PrefetchLinesC[][2][DC__NUM_DPP__MAX],

		int swath_width_luma_ub_all_states[][2][DC__NUM_DPP__MAX],

		int swath_width_chroma_ub_all_states[][2][DC__NUM_DPP__MAX],

		unsigned int swath_width_luma_ub_all_states[][2][DC__NUM_DPP__MAX],

		unsigned int swath_width_chroma_ub_all_states[][2][DC__NUM_DPP__MAX],

		int BytePerPixelY[],

		int BytePerPixelC[],

		int HTotal[],

drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c

+1 −1
Original line number Diff line number Diff line
@@ -2996,7 +2996,7 @@ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman 
				v->ImmediateFlipSupported)) ? true : false;

#ifdef __DML_VBA_DEBUG__

		dml_print("DML::%s: PrefetchModeSupported %d\n", __func__, v->PrefetchModeSupported);

		dml_print("DML::%s: ImmediateFlipRequirement %d\n", __func__, v->ImmediateFlipRequirement == dm_immediate_flip_required);

		dml_print("DML::%s: ImmediateFlipRequirement[0] %d\n", __func__, v->ImmediateFlipRequirement[0] == dm_immediate_flip_required);

		dml_print("DML::%s: ImmediateFlipSupported %d\n", __func__, v->ImmediateFlipSupported);

		dml_print("DML::%s: ImmediateFlipSupport %d\n", __func__, v->ImmediateFlipSupport);

		dml_print("DML::%s: HostVMEnable %d\n", __func__, v->HostVMEnable);

drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c

0 → 100644
+3835 −0

File added.

Preview size limit exceeded, changes collapsed.

drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.h

0 → 100644
+57 −0
Original line number Diff line number Diff line 
/*

 * Copyright 2022 Advanced Micro Devices, Inc.

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the "Software"),

 * to deal in the Software without restriction, including without limitation

 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

 * and/or sell copies of the Software, and to permit persons to whom the

 * Software is furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice shall be included in

 * all copies or substantial portions of the Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL

 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR

 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,

 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

 * OTHER DEALINGS IN THE SOFTWARE.

 *

 * Authors: AMD

 *

 */



#ifndef __DML32_DISPLAY_MODE_VBA_H__

#define __DML32_DISPLAY_MODE_VBA_H__



#include "../display_mode_enums.h"



// To enable a lot of debug msg

//#define __DML_VBA_DEBUG__

// For DML-C changes that hasn't been propagated to VBA yet

//#define __DML_VBA_ALLOW_DELTA__



// Move these to ip parameters/constant

// At which vstartup the DML start to try if the mode can be supported

#define __DML_VBA_MIN_VSTARTUP__    9



// Delay in DCFCLK from ARB to DET (1st num is ARB to SDPIF, 2nd number is SDPIF to DET)

#define __DML_ARB_TO_RET_DELAY__    7 + 95



// fudge factor for min dcfclk calclation

#define __DML_MIN_DCFCLK_FACTOR__   1.15



// Prefetch schedule max vratio

#define __DML_MAX_VRATIO_PRE__ 4.0



#define BPP_INVALID 0

#define BPP_BLENDED_PIPE 0xffffffff



struct display_mode_lib;



void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib);

void dml32_recalculate(struct display_mode_lib *mode_lib);



#endif