Commit dd470387 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'thermal-v5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux 

Pull thermal updates from Daniel Lezcano:

 - Add the tegra3 thermal sensor and fix the compilation testing on
   tegra by adding a dependency on ARCH_TEGRA along with COMPILE_TEST
   (Dmitry Osipenko)

 - Fix the error code for the exynos when devm_get_clk() fails (Dan
   Carpenter)

 - Add the TCC cooling support for AlderLake platform (Sumeet Pawnikar)

 - Add support for hardware trip points for the rcar gen3 thermal driver
   and store TSC id as unsigned int (Niklas Söderlund)

 - Replace the deprecated CPU-hotplug functions get_online_cpus() and
   put_online_cpus (Sebastian Andrzej Siewior)

 - Add the thermal tools directory in the MAINTAINERS file (Daniel
   Lezcano)

 - Fix the Makefile and the cross compilation flags for the userspace
   'tmon' tool (Rolf Eike Beer)

 - Allow to use the IMOK independently from the GDDV on Int340x (Sumeet
   Pawnikar)

 - Fix the stub thermal_cooling_device_register() function prototype
   which does not match the real function (Arnd Bergmann)

 - Make the thermal trip point optional in the DT bindings (Maxime
   Ripard)

 - Fix a typo in a comment in the core code (Geert Uytterhoeven)

 - Reduce the verbosity of the trace in the SoC thermal tegra driver
   (Dmitry Osipenko)

 - Add the support for the LMh (Limit Management hardware) driver on the
   QCom platforms (Thara Gopinath)

 - Allow processing of HWP interrupt by adding a weak function in the
   Intel driver (Srinivas Pandruvada)

 - Prevent an abort of the sensor probe is a channel is not used
   (Matthias Kaehlcke)

* tag 'thermal-v5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux:
  thermal/drivers/qcom/spmi-adc-tm5: Don't abort probing if a sensor is not used
  thermal/drivers/intel: Allow processing of HWP interrupt
  dt-bindings: thermal: Add dt binding for QCOM LMh
  thermal/drivers/qcom: Add support for LMh driver
  firmware: qcom_scm: Introduce SCM calls to access LMh
  thermal/drivers/tegra-soctherm: Silence message about clamped temperature
  thermal: Spelling s/scallbacks/callbacks/
  dt-bindings: thermal: Make trips node optional
  thermal/core: Fix thermal_cooling_device_register() prototype
  thermal/drivers/int340x: Use IMOK independently
  tools/thermal/tmon: Add cross compiling support
  thermal/tools/tmon: Improve the Makefile
  MAINTAINERS: Add missing userspace thermal tools to the thermal section
  thermal/drivers/intel_powerclamp: Replace deprecated CPU-hotplug functions.
  thermal/drivers/rcar_gen3_thermal: Store TSC id as unsigned int
  thermal/drivers/rcar_gen3_thermal: Add support for hardware trip points
  drivers/thermal/intel: Add TCC cooling support for AlderLake platform
  thermal/drivers/exynos: Fix an error code in exynos_tmu_probe()
  thermal/drivers/tegra: Correct compile-testing of drivers
  thermal/drivers/tegra: Add driver for Tegra30 thermal sensor
parents 765092e4 70ee251d

Documentation/devicetree/bindings/thermal/qcom-lmh.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

# Copyright 2021 Linaro Ltd.

%YAML 1.2

---

$id: http://devicetree.org/schemas/thermal/qcom-lmh.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Qualcomm Limits Management Hardware(LMh)



maintainers:

  - Thara Gopinath <thara.gopinath@linaro.org>



description:

  Limits Management Hardware(LMh) is a hardware infrastructure on some

  Qualcomm SoCs that can enforce temperature and current limits as

  programmed by software for certain IPs like CPU.



properties:

  compatible:

    enum:

      - qcom,sdm845-lmh



  reg:

    items:

      - description: core registers



  interrupts:

    maxItems: 1



  '#interrupt-cells':

    const: 1



  interrupt-controller: true



  cpus:

    description:

      phandle of the first cpu in the LMh cluster

    $ref: /schemas/types.yaml#/definitions/phandle



  qcom,lmh-temp-arm-millicelsius:

    description:

      An integer expressing temperature threshold at which the LMh thermal

      FSM is engaged.



  qcom,lmh-temp-low-millicelsius:

    description:

      An integer expressing temperature threshold at which the state machine

      will attempt to remove frequency throttling.



  qcom,lmh-temp-high-millicelsius:

    description:

      An integer expressing temperature threshold at which the state machine

      will attempt to throttle the frequency.



required:

  - compatible

  - reg

  - interrupts

  - '#interrupt-cells'

  - interrupt-controller

  - cpus

  - qcom,lmh-temp-arm-millicelsius

  - qcom,lmh-temp-low-millicelsius

  - qcom,lmh-temp-high-millicelsius



additionalProperties: false



examples:

  - |

    #include <dt-bindings/interrupt-controller/arm-gic.h>



    lmh@17d70800 {

      compatible = "qcom,sdm845-lmh";

      reg = <0x17d70800 0x400>;

      interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;

      cpus = <&CPU4>;

      qcom,lmh-temp-arm-millicelsius = <65000>;

      qcom,lmh-temp-low-millicelsius = <94500>;

      qcom,lmh-temp-high-millicelsius = <95000>;

      interrupt-controller;

      #interrupt-cells = <1>;

    };

Documentation/devicetree/bindings/thermal/thermal-zones.yaml

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@@ -215,7 +215,7 @@ patternProperties: 
      - polling-delay

      - polling-delay-passive

      - thermal-sensors

      - trips



    additionalProperties: false



additionalProperties: false

MAINTAINERS

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@@ -18566,6 +18566,7 @@ F: drivers/thermal/ 
F:	include/linux/cpu_cooling.h

F:	include/linux/thermal.h

F:	include/uapi/linux/thermal.h

F:	tools/thermal/









THERMAL DRIVER FOR AMLOGIC SOCS









M:	Guillaume La Roque <glaroque@baylibre.com>

























drivers/firmware/qcom_scm.c



+58
−0






























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Diff line







@@ -1147,6 +1147,64 @@ int qcom_scm_qsmmu500_wait_safe_toggle(bool en)







}









EXPORT_SYMBOL(qcom_scm_qsmmu500_wait_safe_toggle);



















bool qcom_scm_lmh_dcvsh_available(void)









{









	return __qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_LMH, QCOM_SCM_LMH_LIMIT_DCVSH);









}









EXPORT_SYMBOL(qcom_scm_lmh_dcvsh_available);



















int qcom_scm_lmh_profile_change(u32 profile_id)









{









	struct qcom_scm_desc desc = {









		.svc = QCOM_SCM_SVC_LMH,









		.cmd = QCOM_SCM_LMH_LIMIT_PROFILE_CHANGE,









		.arginfo = QCOM_SCM_ARGS(1, QCOM_SCM_VAL),









		.args[0] = profile_id,









		.owner = ARM_SMCCC_OWNER_SIP,









	};



















	return qcom_scm_call(__scm->dev, &desc, NULL);









}









EXPORT_SYMBOL(qcom_scm_lmh_profile_change);



















int qcom_scm_lmh_dcvsh(u32 payload_fn, u32 payload_reg, u32 payload_val,









		       u64 limit_node, u32 node_id, u64 version)









{









	dma_addr_t payload_phys;









	u32 *payload_buf;









	int ret, payload_size = 5 * sizeof(u32);



















	struct qcom_scm_desc desc = {









		.svc = QCOM_SCM_SVC_LMH,









		.cmd = QCOM_SCM_LMH_LIMIT_DCVSH,









		.arginfo = QCOM_SCM_ARGS(5, QCOM_SCM_RO, QCOM_SCM_VAL, QCOM_SCM_VAL,









					QCOM_SCM_VAL, QCOM_SCM_VAL),









		.args[1] = payload_size,









		.args[2] = limit_node,









		.args[3] = node_id,









		.args[4] = version,









		.owner = ARM_SMCCC_OWNER_SIP,









	};



















	payload_buf = dma_alloc_coherent(__scm->dev, payload_size, &payload_phys, GFP_KERNEL);









	if (!payload_buf)









		return -ENOMEM;



















	payload_buf[0] = payload_fn;









	payload_buf[1] = 0;









	payload_buf[2] = payload_reg;









	payload_buf[3] = 1;









	payload_buf[4] = payload_val;



















	desc.args[0] = payload_phys;



















	ret = qcom_scm_call(__scm->dev, &desc, NULL);



















	dma_free_coherent(__scm->dev, payload_size, payload_buf, payload_phys);









	return ret;









}









EXPORT_SYMBOL(qcom_scm_lmh_dcvsh);



















static int qcom_scm_find_dload_address(struct device *dev, u64 *addr)









{









	struct device_node *tcsr;
































drivers/firmware/qcom_scm.h



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−0






























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@@ -114,6 +114,10 @@ extern int scm_legacy_call(struct device *dev, const struct qcom_scm_desc *desc,







#define QCOM_SCM_SVC_HDCP		0x11









#define QCOM_SCM_HDCP_INVOKE		0x01



















#define QCOM_SCM_SVC_LMH			0x13









#define QCOM_SCM_LMH_LIMIT_PROFILE_CHANGE	0x01









#define QCOM_SCM_LMH_LIMIT_DCVSH		0x10



















#define QCOM_SCM_SVC_SMMU_PROGRAM		0x15









#define QCOM_SCM_SMMU_CONFIG_ERRATA1		0x03









#define QCOM_SCM_SMMU_CONFIG_ERRATA1_CLIENT_ALL	0x02