Commit dcfd5192 authored by Alyssa Rosenzweig's avatar Alyssa Rosenzweig Committed by Matthias Brugger
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soc: mediatek: mtk-infracfg: Disable ACP on MT8192 

MT8192 contains an experimental Accelerator Coherency Port
implementation, which does not work correctly but was unintentionally
enabled by default. For correct operation of the GPU, we must set a
chicken bit disabling ACP on MT8192.

Adapted from the following downstream change to the out-of-tree, legacy
Mali GPU driver:

https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/2781271/5



Note this change is required for both Panfrost and the legacy kernel
driver.

Co-developed-by: default avatarRobin Murphy <robin.murphy@arm.com>
Signed-off-by: default avatarRobin Murphy <robin.murphy@arm.com>
Signed-off-by: default avatarAlyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Cc: Nick Fan <Nick.Fan@mediatek.com>
Cc: Nicolas Boichat <drinkcat@chromium.org>
Cc: Chen-Yu Tsai <wenst@chromium.org>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220215184651.12168-1-alyssa.rosenzweig@collabora.com


Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent 15f17683

drivers/soc/mediatek/mtk-infracfg.c

+19 −0
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ 
#include <linux/export.h>

#include <linux/jiffies.h>

#include <linux/regmap.h>

#include <linux/mfd/syscon.h>

#include <linux/soc/mediatek/infracfg.h>

#include <asm/processor.h>
@@ -72,3 +73,21 @@ int mtk_infracfg_clear_bus_protection(struct regmap *infracfg, u32 mask, 


	return ret;

}



static int __init mtk_infracfg_init(void)

{

	struct regmap *infracfg;



	/*

	 * MT8192 has an experimental path to route GPU traffic to the DSU's

	 * Accelerator Coherency Port, which is inadvertently enabled by

	 * default. It turns out not to work, so disable it to prevent spurious

	 * GPU faults.

	 */

	infracfg = syscon_regmap_lookup_by_compatible("mediatek,mt8192-infracfg");

	if (!IS_ERR(infracfg))

		regmap_set_bits(infracfg, MT8192_INFRA_CTRL,

				MT8192_INFRA_CTRL_DISABLE_MFG2ACP);

	return 0;

}

postcore_initcall(mtk_infracfg_init);

include/linux/soc/mediatek/infracfg.h

+3 −0
Original line number Diff line number Diff line
@@ -277,6 +277,9 @@ 
#define INFRA_TOPAXI_PROTECTEN_SET		0x0260

#define INFRA_TOPAXI_PROTECTEN_CLR		0x0264



#define MT8192_INFRA_CTRL			0x290

#define MT8192_INFRA_CTRL_DISABLE_MFG2ACP	BIT(9)



#define REG_INFRA_MISC				0xf00

#define F_DDR_4GB_SUPPORT_EN			BIT(13)