Loading Documentation/devicetree/bindings/spi/spi-gpio.txt +4 −2 Original line number Diff line number Diff line Loading @@ -8,8 +8,10 @@ Required properties: - gpio-sck: GPIO spec for the SCK line to use - gpio-miso: GPIO spec for the MISO line to use - gpio-mosi: GPIO spec for the MOSI line to use - cs-gpios: GPIOs to use for chipselect lines - num-chipselects: number of chipselect lines - cs-gpios: GPIOs to use for chipselect lines. Not needed if num-chipselects = <0>. - num-chipselects: Number of chipselect lines. Should be <0> if a single device with no chip select is connected. Example: Loading Documentation/devicetree/bindings/spi/spi-img-spfi.txt 0 → 100644 +37 −0 Original line number Diff line number Diff line IMG Synchronous Peripheral Flash Interface (SPFI) controller Required properties: - compatible: Must be "img,spfi". - reg: Must contain the base address and length of the SPFI registers. - interrupts: Must contain the SPFI interrupt. - clocks: Must contain an entry for each entry in clock-names. See ../clock/clock-bindings.txt for details. - clock-names: Must include the following entries: - spfi: SPI operating clock - sys: SPI system interface clock - dmas: Must contain an entry for each entry in dma-names. See ../dma/dma.txt for details. - dma-names: Must include the following entries: - rx - tx - #address-cells: Must be 1. - #size-cells: Must be 0. Optional properties: - img,supports-quad-mode: Should be set if the interface supports quad mode SPI transfers. Example: spi@18100f00 { compatible = "img,spfi"; reg = <0x18100f00 0x100>; interrupts = <GIC_SHARED 22 IRQ_TYPE_LEVEL_HIGH>; clocks = <&spi_clk>, <&system_clk>; clock-names = "spfi", "sys"; dmas = <&mdc 9 0xffffffff 0>, <&mdc 10 0xffffffff 0>; dma-names = "rx", "tx"; #address-cells = <1>; #size-cells = <0>; }; Documentation/devicetree/bindings/spi/spi-meson.txt 0 → 100644 +22 −0 Original line number Diff line number Diff line Amlogic Meson SPI controllers * SPIFC (SPI Flash Controller) The Meson SPIFC is a controller optimized for communication with SPI NOR memories, without DMA support and a 64-byte unified transmit / receive buffer. Required properties: - compatible: should be "amlogic,meson6-spifc" - reg: physical base address and length of the controller registers - clocks: phandle of the input clock for the baud rate generator - #address-cells: should be 1 - #size-cells: should be 0 spi@c1108c80 { compatible = "amlogic,meson6-spifc"; reg = <0xc1108c80 0x80>; clocks = <&clk81>; #address-cells = <1>; #size-cells = <0>; }; drivers/spi/Kconfig +15 −0 Original line number Diff line number Diff line Loading @@ -225,6 +225,13 @@ config SPI_GPIO GPIO operations, you should be able to leverage that for better speed with a custom version of this driver; see the source code. config SPI_IMG_SPFI tristate "IMG SPFI controller" depends on MIPS || COMPILE_TEST help This enables support for the SPFI master controller found on IMG SoCs. config SPI_IMX tristate "Freescale i.MX SPI controllers" depends on ARCH_MXC || COMPILE_TEST Loading Loading @@ -301,6 +308,14 @@ config SPI_FSL_ESPI From MPC8536, 85xx platform uses the controller, and all P10xx, P20xx, P30xx,P40xx, P50xx uses this controller. config SPI_MESON_SPIFC tristate "Amlogic Meson SPIFC controller" depends on ARCH_MESON || COMPILE_TEST select REGMAP_MMIO help This enables master mode support for the SPIFC (SPI flash controller) available in Amlogic Meson SoCs. config SPI_OC_TINY tristate "OpenCores tiny SPI" depends on GPIOLIB Loading drivers/spi/Makefile +2 −0 Original line number Diff line number Diff line Loading @@ -40,8 +40,10 @@ obj-$(CONFIG_SPI_FSL_LIB) += spi-fsl-lib.o obj-$(CONFIG_SPI_FSL_ESPI) += spi-fsl-espi.o obj-$(CONFIG_SPI_FSL_SPI) += spi-fsl-spi.o obj-$(CONFIG_SPI_GPIO) += spi-gpio.o obj-$(CONFIG_SPI_IMG_SPFI) += spi-img-spfi.o obj-$(CONFIG_SPI_IMX) += spi-imx.o obj-$(CONFIG_SPI_LM70_LLP) += spi-lm70llp.o obj-$(CONFIG_SPI_MESON_SPIFC) += spi-meson-spifc.o obj-$(CONFIG_SPI_MPC512x_PSC) += spi-mpc512x-psc.o obj-$(CONFIG_SPI_MPC52xx_PSC) += spi-mpc52xx-psc.o obj-$(CONFIG_SPI_MPC52xx) += spi-mpc52xx.o Loading Loading
Documentation/devicetree/bindings/spi/spi-gpio.txt +4 −2 Original line number Diff line number Diff line Loading @@ -8,8 +8,10 @@ Required properties: - gpio-sck: GPIO spec for the SCK line to use - gpio-miso: GPIO spec for the MISO line to use - gpio-mosi: GPIO spec for the MOSI line to use - cs-gpios: GPIOs to use for chipselect lines - num-chipselects: number of chipselect lines - cs-gpios: GPIOs to use for chipselect lines. Not needed if num-chipselects = <0>. - num-chipselects: Number of chipselect lines. Should be <0> if a single device with no chip select is connected. Example: Loading
Documentation/devicetree/bindings/spi/spi-img-spfi.txt 0 → 100644 +37 −0 Original line number Diff line number Diff line IMG Synchronous Peripheral Flash Interface (SPFI) controller Required properties: - compatible: Must be "img,spfi". - reg: Must contain the base address and length of the SPFI registers. - interrupts: Must contain the SPFI interrupt. - clocks: Must contain an entry for each entry in clock-names. See ../clock/clock-bindings.txt for details. - clock-names: Must include the following entries: - spfi: SPI operating clock - sys: SPI system interface clock - dmas: Must contain an entry for each entry in dma-names. See ../dma/dma.txt for details. - dma-names: Must include the following entries: - rx - tx - #address-cells: Must be 1. - #size-cells: Must be 0. Optional properties: - img,supports-quad-mode: Should be set if the interface supports quad mode SPI transfers. Example: spi@18100f00 { compatible = "img,spfi"; reg = <0x18100f00 0x100>; interrupts = <GIC_SHARED 22 IRQ_TYPE_LEVEL_HIGH>; clocks = <&spi_clk>, <&system_clk>; clock-names = "spfi", "sys"; dmas = <&mdc 9 0xffffffff 0>, <&mdc 10 0xffffffff 0>; dma-names = "rx", "tx"; #address-cells = <1>; #size-cells = <0>; };
Documentation/devicetree/bindings/spi/spi-meson.txt 0 → 100644 +22 −0 Original line number Diff line number Diff line Amlogic Meson SPI controllers * SPIFC (SPI Flash Controller) The Meson SPIFC is a controller optimized for communication with SPI NOR memories, without DMA support and a 64-byte unified transmit / receive buffer. Required properties: - compatible: should be "amlogic,meson6-spifc" - reg: physical base address and length of the controller registers - clocks: phandle of the input clock for the baud rate generator - #address-cells: should be 1 - #size-cells: should be 0 spi@c1108c80 { compatible = "amlogic,meson6-spifc"; reg = <0xc1108c80 0x80>; clocks = <&clk81>; #address-cells = <1>; #size-cells = <0>; };
drivers/spi/Kconfig +15 −0 Original line number Diff line number Diff line Loading @@ -225,6 +225,13 @@ config SPI_GPIO GPIO operations, you should be able to leverage that for better speed with a custom version of this driver; see the source code. config SPI_IMG_SPFI tristate "IMG SPFI controller" depends on MIPS || COMPILE_TEST help This enables support for the SPFI master controller found on IMG SoCs. config SPI_IMX tristate "Freescale i.MX SPI controllers" depends on ARCH_MXC || COMPILE_TEST Loading Loading @@ -301,6 +308,14 @@ config SPI_FSL_ESPI From MPC8536, 85xx platform uses the controller, and all P10xx, P20xx, P30xx,P40xx, P50xx uses this controller. config SPI_MESON_SPIFC tristate "Amlogic Meson SPIFC controller" depends on ARCH_MESON || COMPILE_TEST select REGMAP_MMIO help This enables master mode support for the SPIFC (SPI flash controller) available in Amlogic Meson SoCs. config SPI_OC_TINY tristate "OpenCores tiny SPI" depends on GPIOLIB Loading
drivers/spi/Makefile +2 −0 Original line number Diff line number Diff line Loading @@ -40,8 +40,10 @@ obj-$(CONFIG_SPI_FSL_LIB) += spi-fsl-lib.o obj-$(CONFIG_SPI_FSL_ESPI) += spi-fsl-espi.o obj-$(CONFIG_SPI_FSL_SPI) += spi-fsl-spi.o obj-$(CONFIG_SPI_GPIO) += spi-gpio.o obj-$(CONFIG_SPI_IMG_SPFI) += spi-img-spfi.o obj-$(CONFIG_SPI_IMX) += spi-imx.o obj-$(CONFIG_SPI_LM70_LLP) += spi-lm70llp.o obj-$(CONFIG_SPI_MESON_SPIFC) += spi-meson-spifc.o obj-$(CONFIG_SPI_MPC512x_PSC) += spi-mpc512x-psc.o obj-$(CONFIG_SPI_MPC52xx_PSC) += spi-mpc52xx-psc.o obj-$(CONFIG_SPI_MPC52xx) += spi-mpc52xx.o Loading