Commit dcdb7aa4 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'amd-drm-fixes-5.12-2021-03-31' of... 

Merge tag 'amd-drm-fixes-5.12-2021-03-31' of https://gitlab.freedesktop.org/agd5f/linux

 into drm-fixes

amd-drm-fixes-5.12-2021-03-31:

amdgpu:
- Polaris idle power fix
- VM fix
- Vangogh S3 fix
- Fixes for non-4K page sizes

amdkfd:
- dqm fence memory corruption fix

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210401020057.17831-1-alexander.deucher@amd.com
parents 7344c827 e3512fb6

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

+2 −2
Original line number Diff line number Diff line
@@ -778,9 +778,9 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) 
			dev_info->high_va_offset = AMDGPU_GMC_HOLE_END;

			dev_info->high_va_max = AMDGPU_GMC_HOLE_END | vm_size;

		}

		dev_info->virtual_address_alignment = max((int)PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE);

		dev_info->virtual_address_alignment = max_t(u32, PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE);

		dev_info->pte_fragment_size = (1 << adev->vm_manager.fragment_size) * AMDGPU_GPU_PAGE_SIZE;

		dev_info->gart_page_size = AMDGPU_GPU_PAGE_SIZE;

		dev_info->gart_page_size = max_t(u32, PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE);

		dev_info->cu_active_number = adev->gfx.cu_info.number;

		dev_info->cu_ao_mask = adev->gfx.cu_info.ao_cu_mask;

		dev_info->ce_ram_size = adev->gfx.ce_ram_size;

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

+5 −5
Original line number Diff line number Diff line
@@ -2197,8 +2197,8 @@ int amdgpu_vm_bo_map(struct amdgpu_device *adev, 
	uint64_t eaddr;



	/* validate the parameters */

	if (saddr & AMDGPU_GPU_PAGE_MASK || offset & AMDGPU_GPU_PAGE_MASK ||

	    size == 0 || size & AMDGPU_GPU_PAGE_MASK)

	if (saddr & ~PAGE_MASK || offset & ~PAGE_MASK ||

	    size == 0 || size & ~PAGE_MASK)

		return -EINVAL;



	/* make sure object fit at this offset */
@@ -2263,8 +2263,8 @@ int amdgpu_vm_bo_replace_map(struct amdgpu_device *adev, 
	int r;



	/* validate the parameters */

	if (saddr & AMDGPU_GPU_PAGE_MASK || offset & AMDGPU_GPU_PAGE_MASK ||

	    size == 0 || size & AMDGPU_GPU_PAGE_MASK)

	if (saddr & ~PAGE_MASK || offset & ~PAGE_MASK ||

	    size == 0 || size & ~PAGE_MASK)

		return -EINVAL;



	/* make sure object fit at this offset */
@@ -2409,7 +2409,7 @@ int amdgpu_vm_bo_clear_mappings(struct amdgpu_device *adev, 
			after->start = eaddr + 1;

			after->last = tmp->last;

			after->offset = tmp->offset;

			after->offset += after->start - tmp->start;

			after->offset += (after->start - tmp->start) << PAGE_SHIFT;

			after->flags = tmp->flags;

			after->bo_va = tmp->bo_va;

			list_add(&after->list, &tmp->bo_va->invalids);

drivers/gpu/drm/amd/amdkfd/kfd_dbgdev.c

+1 −1
Original line number Diff line number Diff line
@@ -155,7 +155,7 @@ static int dbgdev_diq_submit_ib(struct kfd_dbgdev *dbgdev, 


	/* Wait till CP writes sync code: */

	status = amdkfd_fence_wait_timeout(

			(unsigned int *) rm_state,

			rm_state,

			QUEUESTATE__ACTIVE, 1500);



	kfd_gtt_sa_free(dbgdev->dev, mem_obj);

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

+3 −3
Original line number Diff line number Diff line
@@ -1167,7 +1167,7 @@ static int start_cpsch(struct device_queue_manager *dqm) 
	if (retval)

		goto fail_allocate_vidmem;



	dqm->fence_addr = dqm->fence_mem->cpu_ptr;

	dqm->fence_addr = (uint64_t *)dqm->fence_mem->cpu_ptr;

	dqm->fence_gpu_addr = dqm->fence_mem->gpu_addr;



	init_interrupts(dqm);
@@ -1340,8 +1340,8 @@ static int create_queue_cpsch(struct device_queue_manager *dqm, struct queue *q, 
	return retval;

}



int amdkfd_fence_wait_timeout(unsigned int *fence_addr,

				unsigned int fence_value,

int amdkfd_fence_wait_timeout(uint64_t *fence_addr,

				uint64_t fence_value,

				unsigned int timeout_ms)

{

	unsigned long end_jiffies = msecs_to_jiffies(timeout_ms) + jiffies;

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h

+1 −1
Original line number Diff line number Diff line
@@ -192,7 +192,7 @@ struct device_queue_manager { 
	uint16_t		vmid_pasid[VMID_NUM];

	uint64_t		pipelines_addr;

	uint64_t		fence_gpu_addr;

	unsigned int		*fence_addr;

	uint64_t		*fence_addr;

	struct kfd_mem_obj	*fence_mem;

	bool			active_runlist;

	int			sched_policy;