Commit dcabb06b authored by Kunihiko Hayashi's avatar Kunihiko Hayashi Committed by David S. Miller
Browse files

arm64: dts: uniphier: Change phy-mode to RGMII-ID to enable delay pins for RTL8211E 



UniPhier LD20 and PXs3 boards have RTL8211E ethernet phy, and the phy have
the RX/TX delays of RGMII interface using pull-ups on the RXDLY and TXDLY
pins.

After the commit bbc4d71d ("net: phy: realtek: fix rtl8211e rx/tx
delay config"), the delays are working correctly, however, "rgmii" means
no delay and the phy doesn't work. So need to set the phy-mode to
"rgmii-id" to show that RX/TX delays are enabled.

Fixes: c73730ee ("arm64: dts: uniphier: add AVE ethernet node")
Signed-off-by: default avatarKunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 9ba585cc

arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -734,7 +734,7 @@ 
			clocks = <&sys_clk 6>;

			reset-names = "ether";

			resets = <&sys_rst 6>;

			phy-mode = "rgmii";

			phy-mode = "rgmii-id";

			local-mac-address = [00 00 00 00 00 00];

			socionext,syscon-phy-mode = <&soc_glue 0>;

arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -564,7 +564,7 @@ 
			clocks = <&sys_clk 6>;

			reset-names = "ether";

			resets = <&sys_rst 6>;

			phy-mode = "rgmii";

			phy-mode = "rgmii-id";

			local-mac-address = [00 00 00 00 00 00];

			socionext,syscon-phy-mode = <&soc_glue 0>;
@@ -585,7 +585,7 @@ 
			clocks = <&sys_clk 7>;

			reset-names = "ether";

			resets = <&sys_rst 7>;

			phy-mode = "rgmii";

			phy-mode = "rgmii-id";

			local-mac-address = [00 00 00 00 00 00];

			socionext,syscon-phy-mode = <&soc_glue 1>;