Commit dc8a4973 authored by Krishna Manikandan's avatar Krishna Manikandan Committed by Rob Clark
Browse files

drm/msm/disp/dpu1: add flags to indicate obsolete irqs 



Some irqs which are applicable for sdm845 target are no
longer applicable for sc7180 and sc7280 targets. Add a
flag to indicate the irqs which are obsolete for a
particular target so that these irqs are skipped while
checking for matching irq lookup index.

Signed-off-by: default avatarKrishna Manikandan <mkrishn@codeaurora.org>
Link: https://lore.kernel.org/r/1617688895-26275-4-git-send-email-mkrishn@codeaurora.org


Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
parent 7e4526db

drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c

+2 −2
Original line number Diff line number Diff line
@@ -58,8 +58,8 @@ int dpu_core_irq_idx_lookup(struct dpu_kms *dpu_kms, 
	if (!dpu_kms->hw_intr || !dpu_kms->hw_intr->ops.irq_idx_lookup)

		return -EINVAL;



	return dpu_kms->hw_intr->ops.irq_idx_lookup(intr_type,

			instance_idx);

	return dpu_kms->hw_intr->ops.irq_idx_lookup(dpu_kms->hw_intr,

			intr_type, instance_idx);

}



/**

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c

+9 −0
Original line number Diff line number Diff line
@@ -56,6 +56,13 @@ 


#define INTF_SC7280_MASK INTF_SC7180_MASK | BIT(DPU_DATA_HCTL_EN)



#define INTR_SC7180_MASK \

	(BIT(DPU_IRQ_TYPE_PING_PONG_RD_PTR) |\

	BIT(DPU_IRQ_TYPE_PING_PONG_WR_PTR) |\

	BIT(DPU_IRQ_TYPE_PING_PONG_AUTO_REF) |\

	BIT(DPU_IRQ_TYPE_PING_PONG_TEAR_CHECK) |\

	BIT(DPU_IRQ_TYPE_PING_PONG_TE_CHECK))



#define DEFAULT_PIXEL_RAM_SIZE		(50 * 1024)

#define DEFAULT_DPU_LINE_WIDTH		2048

#define DEFAULT_DPU_OUTPUT_LINE_WIDTH	2560
@@ -1085,6 +1092,7 @@ static void sc7180_cfg_init(struct dpu_mdss_cfg *dpu_cfg) 
		.dma_cfg = sdm845_regdma,

		.perf = sc7180_perf_data,

		.mdss_irqs = 0x3f,

		.obsolete_irq = INTR_SC7180_MASK,

	};

}
@@ -1174,6 +1182,7 @@ static void sc7280_cfg_init(struct dpu_mdss_cfg *dpu_cfg) 
		.vbif = sdm845_vbif,

		.perf = sc7280_perf_data,

		.mdss_irqs = 0x1c07,

		.obsolete_irq = INTR_SC7180_MASK,

	};

}

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h

+2 −0
Original line number Diff line number Diff line
@@ -723,6 +723,7 @@ struct dpu_perf_cfg { 
 * @cursor_formats     Supported formats for cursor pipe

 * @vig_formats        Supported formats for vig pipe

 * @mdss_irqs:         Bitmap with the irqs supported by the target

 * @obsolete_irq:       Irq types that are obsolete for a particular target

 */

struct dpu_mdss_cfg {

	u32 hwversion;
@@ -769,6 +770,7 @@ struct dpu_mdss_cfg { 
	const struct dpu_format_extended *vig_formats;



	unsigned long mdss_irqs;

	unsigned long obsolete_irq;

};



struct dpu_mdss_hw_cfg_handler {

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

+9 −4
Original line number Diff line number Diff line
@@ -1345,14 +1345,15 @@ static const struct dpu_irq_type dpu_irq_map[] = { 
	{ DPU_IRQ_TYPE_RESERVED, 0, 0, 12},

};



static int dpu_hw_intr_irqidx_lookup(enum dpu_intr_type intr_type,

		u32 instance_idx)

static int dpu_hw_intr_irqidx_lookup(struct dpu_hw_intr *intr,

	enum dpu_intr_type intr_type, u32 instance_idx)

{

	int i;



	for (i = 0; i < ARRAY_SIZE(dpu_irq_map); i++) {

		if (intr_type == dpu_irq_map[i].intr_type &&

			instance_idx == dpu_irq_map[i].instance_idx)

			instance_idx == dpu_irq_map[i].instance_idx &&

			!(intr->obsolete_irq & BIT(dpu_irq_map[i].intr_type)))

			return i;

	}
@@ -1404,7 +1405,9 @@ static void dpu_hw_intr_dispatch_irq(struct dpu_hw_intr *intr, 
				(irq_idx < end_idx) && irq_status;

				irq_idx++)

			if ((irq_status & dpu_irq_map[irq_idx].irq_mask) &&

				(dpu_irq_map[irq_idx].reg_idx == reg_idx)) {

				(dpu_irq_map[irq_idx].reg_idx == reg_idx) &&

				!(intr->obsolete_irq &

				BIT(dpu_irq_map[irq_idx].intr_type))) {

				/*

				 * Once a match on irq mask, perform a callback

				 * to the given cbfunc. cbfunc will take care
@@ -1716,6 +1719,8 @@ struct dpu_hw_intr *dpu_hw_intr_init(void __iomem *addr, 
	}



	intr->irq_mask = m->mdss_irqs;

	intr->obsolete_irq = m->obsolete_irq;



	spin_lock_init(&intr->irq_lock);



	return intr;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h

+4 −1
Original line number Diff line number Diff line
@@ -83,11 +83,12 @@ struct dpu_hw_intr_ops { 
	/**

	 * irq_idx_lookup - Lookup IRQ index on the HW interrupt type

	 *                 Used for all irq related ops

	 * @intr:		HW interrupt handle

	 * @intr_type:		Interrupt type defined in dpu_intr_type

	 * @instance_idx:	HW interrupt block instance

	 * @return:		irq_idx or -EINVAL for lookup fail

	 */

	int (*irq_idx_lookup)(

	int (*irq_idx_lookup)(struct dpu_hw_intr *intr,

			enum dpu_intr_type intr_type,

			u32 instance_idx);
@@ -179,6 +180,7 @@ struct dpu_hw_intr_ops { 
 * @save_irq_status:  array of IRQ status reg storage created during init

 * @irq_idx_tbl_size: total number of irq_idx mapped in the hw_interrupts

 * @irq_lock:         spinlock for accessing IRQ resources

 * @obsolete_irq:      irq types that are obsolete for a particular target

 */

struct dpu_hw_intr {

	struct dpu_hw_blk_reg_map hw;
@@ -188,6 +190,7 @@ struct dpu_hw_intr { 
	u32 irq_idx_tbl_size;

	spinlock_t irq_lock;

	unsigned long irq_mask;

	unsigned long obsolete_irq;

};



/**