Loading drivers/bcma/scan.c +11 −11 Original line number Diff line number Diff line Loading @@ -32,17 +32,17 @@ static const struct bcma_device_id_name bcma_bcm_device_names[] = { { BCMA_CORE_4706_CHIPCOMMON, "BCM4706 ChipCommon" }, { BCMA_CORE_4706_SOC_RAM, "BCM4706 SOC RAM" }, { BCMA_CORE_4706_MAC_GBIT, "BCM4706 GBit MAC" }, { BCMA_CORE_PCIEG2, "PCIe Gen 2" }, { BCMA_CORE_DMA, "DMA" }, { BCMA_CORE_SDIO3, "SDIO3" }, { BCMA_CORE_USB20, "USB 2.0" }, { BCMA_CORE_USB30, "USB 3.0" }, { BCMA_CORE_A9JTAG, "ARM Cortex A9 JTAG" }, { BCMA_CORE_DDR23, "Denali DDR2/DDR3 memory controller" }, { BCMA_CORE_ROM, "ROM" }, { BCMA_CORE_NAND, "NAND flash controller" }, { BCMA_CORE_QSPI, "SPI flash controller" }, { BCMA_CORE_CHIPCOMMON_B, "Chipcommon B" }, { BCMA_CORE_NS_PCIEG2, "PCIe Gen 2" }, { BCMA_CORE_NS_DMA, "DMA" }, { BCMA_CORE_NS_SDIO3, "SDIO3" }, { BCMA_CORE_NS_USB20, "USB 2.0" }, { BCMA_CORE_NS_USB30, "USB 3.0" }, { BCMA_CORE_NS_A9JTAG, "ARM Cortex A9 JTAG" }, { BCMA_CORE_NS_DDR23, "Denali DDR2/DDR3 memory controller" }, { BCMA_CORE_NS_ROM, "ROM" }, { BCMA_CORE_NS_NAND, "NAND flash controller" }, { BCMA_CORE_NS_QSPI, "SPI flash controller" }, { BCMA_CORE_NS_CHIPCOMMON_B, "Chipcommon B" }, { BCMA_CORE_ARMCA9, "ARM Cortex A9 core (ihost)" }, { BCMA_CORE_AMEMC, "AMEMC (DDR)" }, { BCMA_CORE_ALTA, "ALTA (I2S)" }, Loading include/linux/bcma/bcma.h +11 −11 Original line number Diff line number Diff line Loading @@ -73,17 +73,17 @@ struct bcma_host_ops { /* Core-ID values. */ #define BCMA_CORE_OOB_ROUTER 0x367 /* Out of band */ #define BCMA_CORE_4706_CHIPCOMMON 0x500 #define BCMA_CORE_PCIEG2 0x501 #define BCMA_CORE_DMA 0x502 #define BCMA_CORE_SDIO3 0x503 #define BCMA_CORE_USB20 0x504 #define BCMA_CORE_USB30 0x505 #define BCMA_CORE_A9JTAG 0x506 #define BCMA_CORE_DDR23 0x507 #define BCMA_CORE_ROM 0x508 #define BCMA_CORE_NAND 0x509 #define BCMA_CORE_QSPI 0x50A #define BCMA_CORE_CHIPCOMMON_B 0x50B #define BCMA_CORE_NS_PCIEG2 0x501 #define BCMA_CORE_NS_DMA 0x502 #define BCMA_CORE_NS_SDIO3 0x503 #define BCMA_CORE_NS_USB20 0x504 #define BCMA_CORE_NS_USB30 0x505 #define BCMA_CORE_NS_A9JTAG 0x506 #define BCMA_CORE_NS_DDR23 0x507 #define BCMA_CORE_NS_ROM 0x508 #define BCMA_CORE_NS_NAND 0x509 #define BCMA_CORE_NS_QSPI 0x50A #define BCMA_CORE_NS_CHIPCOMMON_B 0x50B #define BCMA_CORE_4706_SOC_RAM 0x50E #define BCMA_CORE_ARMCA9 0x510 #define BCMA_CORE_4706_MAC_GBIT 0x52D Loading Loading
drivers/bcma/scan.c +11 −11 Original line number Diff line number Diff line Loading @@ -32,17 +32,17 @@ static const struct bcma_device_id_name bcma_bcm_device_names[] = { { BCMA_CORE_4706_CHIPCOMMON, "BCM4706 ChipCommon" }, { BCMA_CORE_4706_SOC_RAM, "BCM4706 SOC RAM" }, { BCMA_CORE_4706_MAC_GBIT, "BCM4706 GBit MAC" }, { BCMA_CORE_PCIEG2, "PCIe Gen 2" }, { BCMA_CORE_DMA, "DMA" }, { BCMA_CORE_SDIO3, "SDIO3" }, { BCMA_CORE_USB20, "USB 2.0" }, { BCMA_CORE_USB30, "USB 3.0" }, { BCMA_CORE_A9JTAG, "ARM Cortex A9 JTAG" }, { BCMA_CORE_DDR23, "Denali DDR2/DDR3 memory controller" }, { BCMA_CORE_ROM, "ROM" }, { BCMA_CORE_NAND, "NAND flash controller" }, { BCMA_CORE_QSPI, "SPI flash controller" }, { BCMA_CORE_CHIPCOMMON_B, "Chipcommon B" }, { BCMA_CORE_NS_PCIEG2, "PCIe Gen 2" }, { BCMA_CORE_NS_DMA, "DMA" }, { BCMA_CORE_NS_SDIO3, "SDIO3" }, { BCMA_CORE_NS_USB20, "USB 2.0" }, { BCMA_CORE_NS_USB30, "USB 3.0" }, { BCMA_CORE_NS_A9JTAG, "ARM Cortex A9 JTAG" }, { BCMA_CORE_NS_DDR23, "Denali DDR2/DDR3 memory controller" }, { BCMA_CORE_NS_ROM, "ROM" }, { BCMA_CORE_NS_NAND, "NAND flash controller" }, { BCMA_CORE_NS_QSPI, "SPI flash controller" }, { BCMA_CORE_NS_CHIPCOMMON_B, "Chipcommon B" }, { BCMA_CORE_ARMCA9, "ARM Cortex A9 core (ihost)" }, { BCMA_CORE_AMEMC, "AMEMC (DDR)" }, { BCMA_CORE_ALTA, "ALTA (I2S)" }, Loading
include/linux/bcma/bcma.h +11 −11 Original line number Diff line number Diff line Loading @@ -73,17 +73,17 @@ struct bcma_host_ops { /* Core-ID values. */ #define BCMA_CORE_OOB_ROUTER 0x367 /* Out of band */ #define BCMA_CORE_4706_CHIPCOMMON 0x500 #define BCMA_CORE_PCIEG2 0x501 #define BCMA_CORE_DMA 0x502 #define BCMA_CORE_SDIO3 0x503 #define BCMA_CORE_USB20 0x504 #define BCMA_CORE_USB30 0x505 #define BCMA_CORE_A9JTAG 0x506 #define BCMA_CORE_DDR23 0x507 #define BCMA_CORE_ROM 0x508 #define BCMA_CORE_NAND 0x509 #define BCMA_CORE_QSPI 0x50A #define BCMA_CORE_CHIPCOMMON_B 0x50B #define BCMA_CORE_NS_PCIEG2 0x501 #define BCMA_CORE_NS_DMA 0x502 #define BCMA_CORE_NS_SDIO3 0x503 #define BCMA_CORE_NS_USB20 0x504 #define BCMA_CORE_NS_USB30 0x505 #define BCMA_CORE_NS_A9JTAG 0x506 #define BCMA_CORE_NS_DDR23 0x507 #define BCMA_CORE_NS_ROM 0x508 #define BCMA_CORE_NS_NAND 0x509 #define BCMA_CORE_NS_QSPI 0x50A #define BCMA_CORE_NS_CHIPCOMMON_B 0x50B #define BCMA_CORE_4706_SOC_RAM 0x50E #define BCMA_CORE_ARMCA9 0x510 #define BCMA_CORE_4706_MAC_GBIT 0x52D Loading