Commit dc1d9934 authored by Yong Wu's avatar Yong Wu Committed by Joerg Roedel
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dt-bindings: mediatek: mt8195: Add binding for infra IOMMU 



In mt8195, we have a new IOMMU that is for INFRA IOMMU. its masters
mainly are PCIe and USB. Different with MM IOMMU, all these masters
connect with IOMMU directly, there is no mediatek,larbs property for
infra IOMMU.

Another thing is about PCIe ports. currently the function
"of_iommu_configure_dev_id" only support the id number is 1, But our
PCIe have two ports, one is for reading and the other is for writing.
see more about the PCIe patch in this patchset. Thus, I only list
the reading id here and add the other id in our driver.

Signed-off-by: default avatarYong Wu <yong.wu@mediatek.com>
Acked-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Reviewed-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
Link: https://lore.kernel.org/r/20220503071427.2285-3-yong.wu@mediatek.com


Signed-off-by: default avatarJoerg Roedel <jroedel@suse.de>
parent 6625ffb9

Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml

+12 −1
Original line number Diff line number Diff line
@@ -79,6 +79,7 @@ properties: 
          - mediatek,mt8192-m4u  # generation two

          - mediatek,mt8195-iommu-vdo        # generation two

          - mediatek,mt8195-iommu-vpp        # generation two

          - mediatek,mt8195-iommu-infra      # generation two



      - description: mt7623 generation one

        items:
@@ -131,7 +132,6 @@ required: 
  - compatible

  - reg

  - interrupts

  - mediatek,larbs

  - '#iommu-cells'



allOf:
@@ -163,6 +163,17 @@ allOf: 
      required:

        - power-domains



  - if: # The IOMMUs don't have larbs.

      not:

        properties:

          compatible:

            contains:

              const: mediatek,mt8195-iommu-infra



    then:

      required:

        - mediatek,larbs



additionalProperties: false



examples:

include/dt-bindings/memory/mt8195-memory-port.h

+18 −0
Original line number Diff line number Diff line
@@ -387,4 +387,22 @@ 
#define M4U_PORT_L28_CAM_DRZS4NO_R1		MTK_M4U_ID(28, 5)

#define M4U_PORT_L28_CAM_TNCSO_R1		MTK_M4U_ID(28, 6)



/* Infra iommu ports */

/* PCIe1: read: BIT16; write BIT17. */

#define IOMMU_PORT_INFRA_PCIE1			MTK_IFAIOMMU_PERI_ID(16)

/* PCIe0: read: BIT18; write BIT19. */

#define IOMMU_PORT_INFRA_PCIE0			MTK_IFAIOMMU_PERI_ID(18)

#define IOMMU_PORT_INFRA_SSUSB_P3_R		MTK_IFAIOMMU_PERI_ID(20)

#define IOMMU_PORT_INFRA_SSUSB_P3_W		MTK_IFAIOMMU_PERI_ID(21)

#define IOMMU_PORT_INFRA_SSUSB_P2_R		MTK_IFAIOMMU_PERI_ID(22)

#define IOMMU_PORT_INFRA_SSUSB_P2_W		MTK_IFAIOMMU_PERI_ID(23)

#define IOMMU_PORT_INFRA_SSUSB_P1_1_R		MTK_IFAIOMMU_PERI_ID(24)

#define IOMMU_PORT_INFRA_SSUSB_P1_1_W		MTK_IFAIOMMU_PERI_ID(25)

#define IOMMU_PORT_INFRA_SSUSB_P1_0_R		MTK_IFAIOMMU_PERI_ID(26)

#define IOMMU_PORT_INFRA_SSUSB_P1_0_W		MTK_IFAIOMMU_PERI_ID(27)

#define IOMMU_PORT_INFRA_SSUSB2_R		MTK_IFAIOMMU_PERI_ID(28)

#define IOMMU_PORT_INFRA_SSUSB2_W		MTK_IFAIOMMU_PERI_ID(29)

#define IOMMU_PORT_INFRA_SSUSB_R		MTK_IFAIOMMU_PERI_ID(30)

#define IOMMU_PORT_INFRA_SSUSB_W		MTK_IFAIOMMU_PERI_ID(31)



#endif

include/dt-bindings/memory/mtk-memory-port.h

+2 −0
Original line number Diff line number Diff line
@@ -12,4 +12,6 @@ 
#define MTK_M4U_TO_LARB(id)		(((id) >> 5) & 0x1f)

#define MTK_M4U_TO_PORT(id)		((id) & 0x1f)



#define MTK_IFAIOMMU_PERI_ID(port)	MTK_M4U_ID(0, port)



#endif