Commit dc12a3ec authored by Leo Liu's avatar Leo Liu Committed by Alex Deucher
Browse files

drm/radeon: enable SRBM timeout interrupt on CIK v2 



v2: disable it on suspend

Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e1b4e722

drivers/gpu/drm/radeon/cik.c

+8 −0
Original line number Diff line number Diff line
@@ -3613,6 +3613,8 @@ static void cik_gpu_init(struct radeon_device *rdev) 
	}



	WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff));

	WREG32(SRBM_INT_CNTL, 0x1);

	WREG32(SRBM_INT_ACK, 0x1);



	WREG32(BIF_FB_EN, FB_READ_EN | FB_WRITE_EN);
@@ -7230,6 +7232,8 @@ static void cik_disable_interrupt_state(struct radeon_device *rdev) 
	WREG32(CP_ME2_PIPE3_INT_CNTL, 0);

	/* grbm */

	WREG32(GRBM_INT_CNTL, 0);

	/* SRBM */

	WREG32(SRBM_INT_CNTL, 0);

	/* vline/vblank, etc. */

	WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0);

	WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0);
@@ -8046,6 +8050,10 @@ int cik_irq_process(struct radeon_device *rdev) 
				break;

			}

			break;

		case 96:

			DRM_ERROR("SRBM_READ_ERROR: 0x%x\n", RREG32(SRBM_READ_ERROR));

			WREG32(SRBM_INT_ACK, 0x1);

			break;

		case 124: /* UVD */

			DRM_DEBUG("IH: UVD int: 0x%08x\n", src_data);

			radeon_fence_process(rdev, R600_RING_TYPE_UVD_INDEX);

drivers/gpu/drm/radeon/cikd.h

+4 −0
Original line number Diff line number Diff line
@@ -482,6 +482,10 @@ 
#define		SOFT_RESET_ORB				(1 << 23)

#define		SOFT_RESET_VCE				(1 << 24)



#define SRBM_READ_ERROR					0xE98

#define SRBM_INT_CNTL					0xEA0

#define SRBM_INT_ACK					0xEA8



#define VM_L2_CNTL					0x1400

#define		ENABLE_L2_CACHE					(1 << 0)

#define		ENABLE_L2_FRAGMENT_PROCESSING			(1 << 1)