Commit dbbdb8da authored by Linus Walleij's avatar Linus Walleij
Browse files

Merge tag 'renesas-pinctrl-for-v5.12-tag1' of...

Merge tag 'renesas-pinctrl-for-v5.12-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: renesas: Updates for v5.12

  - Restrict debug runtime-checks to Renesas platforms,
  - Initial support for the R-Car V3U SoC.
parents 60c456e0 a5cda861
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+2 −1
Original line number Diff line number Diff line
@@ -43,11 +43,12 @@ properties:
      - renesas,pfc-r8a77980    # R-Car V3H
      - renesas,pfc-r8a77990    # R-Car E3
      - renesas,pfc-r8a77995    # R-Car D3
      - renesas,pfc-r8a779a0    # R-Car V3U
      - renesas,pfc-sh73a0      # SH-Mobile AG5

  reg:
    minItems: 1
    maxItems: 2
    maxItems: 10

  gpio-controller: true

+5 −0
Original line number Diff line number Diff line
@@ -36,6 +36,7 @@ config PINCTRL_RENESAS
	select PINCTRL_PFC_R8A77980 if ARCH_R8A77980
	select PINCTRL_PFC_R8A77990 if ARCH_R8A77990
	select PINCTRL_PFC_R8A77995 if ARCH_R8A77995
	select PINCTRL_PFC_R8A779A0 if ARCH_R8A779A0
	select PINCTRL_PFC_SH7203 if CPU_SUBTYPE_SH7203
	select PINCTRL_PFC_SH7264 if CPU_SUBTYPE_SH7264
	select PINCTRL_PFC_SH7269 if CPU_SUBTYPE_SH7269
@@ -142,6 +143,10 @@ config PINCTRL_PFC_R8A77970
	bool "pin control support for R-Car V3M" if COMPILE_TEST
	select PINCTRL_SH_PFC

config PINCTRL_PFC_R8A779A0
	bool "pin control support for R-Car V3U" if COMPILE_TEST
	select PINCTRL_SH_PFC

config PINCTRL_PFC_R8A7740
	bool "pin control support for R-Mobile A1" if COMPILE_TEST
	select PINCTRL_SH_PFC_GPIO
+1 −0
Original line number Diff line number Diff line
@@ -29,6 +29,7 @@ obj-$(CONFIG_PINCTRL_PFC_R8A77970) += pfc-r8a77970.o
obj-$(CONFIG_PINCTRL_PFC_R8A77980)	+= pfc-r8a77980.o
obj-$(CONFIG_PINCTRL_PFC_R8A77990)	+= pfc-r8a77990.o
obj-$(CONFIG_PINCTRL_PFC_R8A77995)	+= pfc-r8a77995.o
obj-$(CONFIG_PINCTRL_PFC_R8A779A0)	+= pfc-r8a779a0.o
obj-$(CONFIG_PINCTRL_PFC_SH7203)	+= pfc-sh7203.o
obj-$(CONFIG_PINCTRL_PFC_SH7264)	+= pfc-sh7264.o
obj-$(CONFIG_PINCTRL_PFC_SH7269)	+= pfc-sh7269.o
+28 −10
Original line number Diff line number Diff line
@@ -175,13 +175,25 @@ u32 sh_pfc_read(struct sh_pfc *pfc, u32 reg)
	return sh_pfc_read_raw_reg(sh_pfc_phys_to_virt(pfc, reg), 32);
}

void sh_pfc_write(struct sh_pfc *pfc, u32 reg, u32 data)
static void sh_pfc_unlock_reg(struct sh_pfc *pfc, u32 reg, u32 data)
{
	if (pfc->info->unlock_reg)
		sh_pfc_write_raw_reg(
			sh_pfc_phys_to_virt(pfc, pfc->info->unlock_reg), 32,
			~data);
	u32 unlock;

	if (!pfc->info->unlock_reg)
		return;

	if (pfc->info->unlock_reg >= 0x80000000UL)
		unlock = pfc->info->unlock_reg;
	else
		/* unlock_reg is a mask */
		unlock = reg & ~pfc->info->unlock_reg;

	sh_pfc_write_raw_reg(sh_pfc_phys_to_virt(pfc, unlock), 32, ~data);
}

void sh_pfc_write(struct sh_pfc *pfc, u32 reg, u32 data)
{
	sh_pfc_unlock_reg(pfc, reg, data);
	sh_pfc_write_raw_reg(sh_pfc_phys_to_virt(pfc, reg), 32, data);
}

@@ -227,11 +239,7 @@ static void sh_pfc_write_config_reg(struct sh_pfc *pfc,
	data &= mask;
	data |= value;

	if (pfc->info->unlock_reg)
		sh_pfc_write_raw_reg(
			sh_pfc_phys_to_virt(pfc, pfc->info->unlock_reg), 32,
			~data);

	sh_pfc_unlock_reg(pfc, crp->reg, data);
	sh_pfc_write_raw_reg(mapped_reg, crp->reg_width, data);
}

@@ -638,6 +646,12 @@ static const struct of_device_id sh_pfc_of_table[] = {
		.data = &r8a77995_pinmux_info,
	},
#endif
#ifdef CONFIG_PINCTRL_PFC_R8A779A0
	{
		.compatible = "renesas,pfc-r8a779a0",
		.data = &r8a779a0_pinmux_info,
	},
#endif
#ifdef CONFIG_PINCTRL_PFC_SH73A0
	{
		.compatible = "renesas,pfc-sh73a0",
@@ -1052,6 +1066,10 @@ static void __init sh_pfc_check_driver(const struct platform_driver *pdrv)
{
	unsigned int i;

	if (!IS_ENABLED(CONFIG_SUPERH) &&
	    !of_find_matching_node(NULL, pdrv->driver.of_match_table))
		return;

	sh_pfc_regs = kcalloc(SH_PFC_MAX_REGS, sizeof(*sh_pfc_regs),
			      GFP_KERNEL);
	if (!sh_pfc_regs)
+4460 −0

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