Commit db7a3464 authored by Kishon Vijay Abraham I's avatar Kishon Vijay Abraham I Committed by Vinod Koul
Browse files

dt-bindings: phy: phy-cadence-sierra: Add binding to model Sierra as clock provider



Add #clock-cells binding to model Sierra as clock provider and include
clock IDs for PLL_CMNLC and PLL_CMNLC1.

Signed-off-by: default avatarKishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210319124128.13308-12-kishon@ti.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 29c2d02a
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+16 −1
Original line number Diff line number Diff line
@@ -26,6 +26,9 @@ properties:
  '#size-cells':
    const: 0

  '#clock-cells':
    const: 1

  resets:
    minItems: 1
    maxItems: 2
@@ -49,12 +52,24 @@ properties:
    const: serdes

  clocks:
    maxItems: 2
    minItems: 2
    maxItems: 4

  clock-names:
    minItems: 2
    items:
      - const: cmn_refclk_dig_div
      - const: cmn_refclk1_dig_div
      - const: pll0_refclk
      - const: pll1_refclk

  assigned-clocks:
    minItems: 1
    maxItems: 2

  assigned-clock-parents:
    minItems: 1
    maxItems: 2

  cdns,autoconf:
    type: boolean
+4 −0
Original line number Diff line number Diff line
@@ -13,4 +13,8 @@

#define CDNS_TORRENT_REFCLK_DRIVER      0

/* Sierra */
#define CDNS_SIERRA_PLL_CMNLC		0
#define CDNS_SIERRA_PLL_CMNLC1		1

#endif /* _DT_BINDINGS_CADENCE_SERDES_H */