Commit db2f4482 authored by Eugen Hristev's avatar Eugen Hristev Committed by Stephen Boyd
Browse files

clk: at91: sam9x60-pll: adapt PMC_PLL_ACR default value 



Product datasheet recommends different values for UPLL and PLLA analog control
register.
Adapt accordingly.

Signed-off-by: default avatarEugen Hristev <eugen.hristev@microchip.com>
Link: https://lkml.kernel.org/r/1573478913-19737-1-git-send-email-eugen.hristev@microchip.com


Acked-by: default avatarNicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent e42617b8

drivers/clk/at91/clk-sam9x60-pll.c

+6 −2
Original line number Diff line number Diff line
@@ -25,7 +25,8 @@ 
#define		PMC_PLL_CTRL1_MUL_MSK		GENMASK(30, 24)



#define PMC_PLL_ACR	0x18

#define		PMC_PLL_ACR_DEFAULT		0x1b040010UL

#define		PMC_PLL_ACR_DEFAULT_UPLL	0x12020010UL

#define		PMC_PLL_ACR_DEFAULT_PLLA	0x00020010UL

#define		PMC_PLL_ACR_UTMIVR		BIT(12)

#define		PMC_PLL_ACR_UTMIBG		BIT(13)

#define		PMC_PLL_ACR_LOOP_FILTER_MSK	GENMASK(31, 24)
@@ -88,7 +89,10 @@ static int sam9x60_pll_prepare(struct clk_hw *hw) 
	}



	/* Recommended value for PMC_PLL_ACR */

	val = PMC_PLL_ACR_DEFAULT;

	if (pll->characteristics->upll)

		val = PMC_PLL_ACR_DEFAULT_UPLL;

	else

		val = PMC_PLL_ACR_DEFAULT_PLLA;

	regmap_write(regmap, PMC_PLL_ACR, val);



	regmap_write(regmap, PMC_PLL_CTRL1,