Commit db19c724 authored by Pankaj Bharadiya's avatar Pankaj Bharadiya Committed by Zhenyu Wang
Browse files

drm/i915/gvt: Make WARN* drm specific where drm_priv ptr is available 



drm specific WARN* calls include device information in the
backtrace, so we know what device the warnings originate from.

Covert all the calls of WARN* with device specific drm_WARN*
variants in functions where drm_i915_private struct pointer is
readily available.

The conversion was done automatically with below coccinelle semantic
patch. checkpatch errors/warnings are fixed manually.

@rule1@
identifier func, T;
@@
func(...) {
...
struct drm_i915_private *T = ...;
<+...
(
-WARN(
+drm_WARN(&T->drm,
...)
|
-WARN_ON(
+drm_WARN_ON(&T->drm,
...)
|
-WARN_ONCE(
+drm_WARN_ONCE(&T->drm,
...)
|
-WARN_ON_ONCE(
+drm_WARN_ON_ONCE(&T->drm,
...)
)
...+>
}

@rule2@
identifier func, T;
@@
func(struct drm_i915_private *T,...) {
<+...
(
-WARN(
+drm_WARN(&T->drm,
...)
|
-WARN_ON(
+drm_WARN_ON(&T->drm,
...)
|
-WARN_ONCE(
+drm_WARN_ONCE(&T->drm,
...)
|
-WARN_ON_ONCE(
+drm_WARN_ON_ONCE(&T->drm,
...)
)
...+>
}

Signed-off-by: default avatarPankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com>
Acked-by: default avatarZhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: default avatarZhenyu Wang <zhenyuw@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20200220165507.16823-8-pankaj.laxminarayan.bharadiya@intel.com
parent 06d63c48

drivers/gpu/drm/i915/gvt/aperture_gm.c

+3 −3
Original line number Diff line number Diff line
@@ -134,11 +134,11 @@ void intel_vgpu_write_fence(struct intel_vgpu *vgpu, 


	assert_rpm_wakelock_held(&dev_priv->runtime_pm);



	if (WARN_ON(fence >= vgpu_fence_sz(vgpu)))

	if (drm_WARN_ON(&dev_priv->drm, fence >= vgpu_fence_sz(vgpu)))

		return;



	reg = vgpu->fence.regs[fence];

	if (WARN_ON(!reg))

	if (drm_WARN_ON(&dev_priv->drm, !reg))

		return;



	fence_reg_lo = FENCE_REG_GEN6_LO(reg->id);
@@ -167,7 +167,7 @@ static void free_vgpu_fence(struct intel_vgpu *vgpu) 
	struct i915_fence_reg *reg;

	u32 i;



	if (WARN_ON(!vgpu_fence_sz(vgpu)))

	if (drm_WARN_ON(&dev_priv->drm, !vgpu_fence_sz(vgpu)))

		return;



	intel_runtime_pm_get(&dev_priv->runtime_pm);

drivers/gpu/drm/i915/gvt/cmd_parser.c

+2 −2
Original line number Diff line number Diff line
@@ -1230,7 +1230,7 @@ static int gen8_decode_mi_display_flip(struct parser_exec_state *s, 
	dword2 = cmd_val(s, 2);



	v = (dword0 & GENMASK(21, 19)) >> 19;

	if (WARN_ON(v >= ARRAY_SIZE(gen8_plane_code)))

	if (drm_WARN_ON(&dev_priv->drm, v >= ARRAY_SIZE(gen8_plane_code)))

		return -EBADRQC;



	info->pipe = gen8_plane_code[v].pipe;
@@ -1250,7 +1250,7 @@ static int gen8_decode_mi_display_flip(struct parser_exec_state *s, 
		info->stride_reg = SPRSTRIDE(info->pipe);

		info->surf_reg = SPRSURF(info->pipe);

	} else {

		WARN_ON(1);

		drm_WARN_ON(&dev_priv->drm, 1);

		return -EBADRQC;

	}

	return 0;

drivers/gpu/drm/i915/gvt/display.c

+2 −1
Original line number Diff line number Diff line
@@ -71,7 +71,8 @@ int pipe_is_enabled(struct intel_vgpu *vgpu, int pipe) 
{

	struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;



	if (WARN_ON(pipe < PIPE_A || pipe >= I915_MAX_PIPES))

	if (drm_WARN_ON(&dev_priv->drm,

			pipe < PIPE_A || pipe >= I915_MAX_PIPES))

		return -EINVAL;



	if (vgpu_vreg_t(vgpu, PIPECONF(pipe)) & PIPECONF_ENABLE)

drivers/gpu/drm/i915/gvt/dmabuf.c

+2 −2
Original line number Diff line number Diff line
@@ -67,11 +67,11 @@ static int vgpu_gem_get_pages( 
	u32 page_num;



	fb_info = (struct intel_vgpu_fb_info *)obj->gvt_info;

	if (WARN_ON(!fb_info))

	if (drm_WARN_ON(&dev_priv->drm, !fb_info))

		return -ENODEV;



	vgpu = fb_info->obj->vgpu;

	if (WARN_ON(!vgpu))

	if (drm_WARN_ON(&dev_priv->drm, !vgpu))

		return -ENODEV;



	st = kmalloc(sizeof(*st), GFP_KERNEL);

drivers/gpu/drm/i915/gvt/edid.c

+1 −1
Original line number Diff line number Diff line
@@ -153,7 +153,7 @@ static int gmbus0_mmio_write(struct intel_vgpu *vgpu, 
		port = cnp_get_port_from_gmbus0(pin_select);

	else

		port = get_port_from_gmbus0(pin_select);

	if (WARN_ON(port < 0))

	if (drm_WARN_ON(&dev_priv->drm, port < 0))

		return 0;



	vgpu->display.i2c_edid.state = I2C_GMBUS;