Commit daf4cfdd authored by Samuel Holland's avatar Samuel Holland Committed by Linus Walleij
Browse files

ARM: dts: sunxi: Drop resets from r_pio nodes 



None of the sunxi pin controllers have a module reset line. This is
confirmed by documentation (A80) as well as experimentation (A33).

Let's remove the inaccurate properties.

Signed-off-by: default avatarSamuel Holland <samuel@sholland.org>
Reviewed-by: default avatarJernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220531053623.43851-3-samuel@sholland.org


Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 59c15025

arch/arm/boot/dts/sun6i-a31.dtsi

+0 −1
Original line number Original line Diff line number Diff line
@@ -1387,7 +1387,6 @@ 
				     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;

				     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>;

			clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>;

			clock-names = "apb", "hosc", "losc";

			clock-names = "apb", "hosc", "losc";

			resets = <&apb0_rst 0>;

			gpio-controller;

			gpio-controller;

			interrupt-controller;

			interrupt-controller;

			#interrupt-cells = <3>;

			#interrupt-cells = <3>;

arch/arm/boot/dts/sun8i-a23-a33.dtsi

+0 −1
Original line number Original line Diff line number Diff line
@@ -812,7 +812,6 @@ 
			interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;

			interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>;

			clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>;

			clock-names = "apb", "hosc", "losc";

			clock-names = "apb", "hosc", "losc";

			resets = <&apb0_rst 0>;

			gpio-controller;

			gpio-controller;

			interrupt-controller;

			interrupt-controller;

			#interrupt-cells = <3>;

			#interrupt-cells = <3>;

arch/arm/boot/dts/sun9i-a80.dtsi

+0 −1
Original line number Original line Diff line number Diff line
@@ -1218,7 +1218,6 @@ 
				     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;

				     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&apbs_gates 0>, <&osc24M>, <&osc32k>;

			clocks = <&apbs_gates 0>, <&osc24M>, <&osc32k>;

			clock-names = "apb", "hosc", "losc";

			clock-names = "apb", "hosc", "losc";

			resets = <&apbs_rst 0>;

			gpio-controller;

			gpio-controller;

			interrupt-controller;

			interrupt-controller;

			#interrupt-cells = <3>;

			#interrupt-cells = <3>;