Commit dac322b1 authored by Mao HongBo's avatar Mao HongBo Committed by Zheng Zengkai
Browse files

iommu: support phytium ft2000plus and S2500 iommu function 

phytium inclusion
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/I41AUQ



----------------------------------------------

To fix iommu issue of device access in virtualization scenario
for ft2000plus and S2500.

Convert to new cputype macros naming of phytium.

Signed-off-by: default avatarMao HongBo <maohongbo@phytium.com.cn>
Signed-off-by: default avatarZheng Zengkai <zhengzengkai@huawei.com>
Reviewed-by: default avatarHanjun Guo <guohanjun@huawei.com>
Acked-by: default avatarXie XiuQi <xiexiuqi@huawei.com>
Signed-off-by: default avatarZheng Zengkai <zhengzengkai@huawei.com>
parent e9a6f6d5

arch/arm64/include/asm/cputype.h

+10 −4
Original line number Diff line number Diff line
@@ -101,8 +101,11 @@ 
#define HISI_CPU_PART_TSV110		0xD01

#define HISI_CPU_PART_TSV200		0xD02



#define PHYTIUM_CPU_PART_FTC662		0x662

#define PHYTIUM_CPU_PART_FTC663		0x663

#define PHYTIUM_CPU_PART_1500A		0X660

#define PHYTIUM_CPU_PART_2000AHK	0X661

#define PHYTIUM_CPU_PART_2000PLUS	0X662

#define PHYTIUM_CPU_PART_2004	        0X663

#define PHYTIUM_CPU_PART_2500		0X663



#define MIDR_CORTEX_A53 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A53)

#define MIDR_CORTEX_A57 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A57)
@@ -133,8 +136,11 @@ 
#define MIDR_FUJITSU_A64FX MIDR_CPU_MODEL(ARM_CPU_IMP_FUJITSU, FUJITSU_CPU_PART_A64FX)

#define MIDR_HISI_TSV110 MIDR_CPU_MODEL(ARM_CPU_IMP_HISI, HISI_CPU_PART_TSV110)

#define MIDR_HISI_TSV200 MIDR_CPU_MODEL(ARM_CPU_IMP_HISI, HISI_CPU_PART_TSV200)

#define MIDR_PHYTIUM_FT2000PLUS MIDR_CPU_MODEL(ARM_CPU_IMP_PHYTIUM, PHYTIUM_CPU_PART_FTC662)

#define MIDR_PHYTIUM_FT2500 MIDR_CPU_MODEL(ARM_CPU_IMP_PHYTIUM, PHYTIUM_CPU_PART_FTC663)

#define MIDR_FT_1500A    MIDR_CPU_MODEL(ARM_CPU_IMP_PHYTIUM, PHYTIUM_CPU_PART_1500A)

#define MIDR_FT_2000AHK	 MIDR_CPU_MODEL(ARM_CPU_IMP_PHYTIUM, PHYTIUM_CPU_PART_2000AHK)

#define MIDR_FT_2000PLUS MIDR_CPU_MODEL(ARM_CPU_IMP_PHYTIUM, PHYTIUM_CPU_PART_2000PLUS)

#define MIDR_FT_2004     MIDR_CPU_MODEL(ARM_CPU_IMP_PHYTIUM, PHYTIUM_CPU_PART_2004)

#define MIDR_FT_2500	 MIDR_CPU_MODEL(ARM_CPU_IMP_PHYTIUM, PHYTIUM_CPU_PART_2500)



/* Fujitsu Erratum 010001 affects A64FX 1.0 and 1.1, (v0r0 and v1r0) */

#define MIDR_FUJITSU_ERRATUM_010001		MIDR_FUJITSU_A64FX

arch/arm64/include/asm/phytium_machine_types.h

0 → 100644
+37 −0
Original line number Diff line number Diff line 
/*

 *  Authors: Wang Yinfeng <wangyinfenng@phytium.com.cn>

 *

 *  Copyright (C) 2021, PHYTIUM Information Technology Co., Ltd.

 *

 *  This library is free software; you can redistribute it and/or

 *  modify it under the terms of the GNU Lesser General Public

 *  License as published by the Free Software Foundation; either

 *  version 2 of the License, or (at your option) any later version.

 *

 *  This library is distributed in the hope that it will be useful,

 *  but WITHOUT ANY WARRANTY; without even the implied warranty of

 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU

 *  Lesser General Public License for more details.

 *

 *  You should have received a copy of the GNU Lesser General Public

 *  License along with this library; if not, see <http://www.gnu.org/licenses/>.

 */



#ifndef __PHYTIUM_MACHINE_TYPE_H__

#define __PHYTIUM_MACHINE_TYPE_H__



#include <asm/cputype.h>

#include <linux/types.h>



static inline bool phytium_part(u32 cpuid)

{

	return ((read_cpuid_id() & MIDR_CPU_MODEL_MASK) == cpuid);

}



#define typeof_ft1500a()	phytium_part(MIDR_FT_1500A)

#define typeof_ft2000ahk()	phytium_part(MIDR_FT_2000AHK)

#define typeof_ft2000plus()	phytium_part(MIDR_FT_2000PLUS)

#define typeof_ft2004()	        phytium_part(MIDR_FT_2004)

#define typeof_s2500()		phytium_part(MIDR_FT_2500)



#endif

arch/arm64/kernel/topology.c

+1 −1
Original line number Diff line number Diff line
@@ -55,7 +55,7 @@ void store_cpu_topology(unsigned int cpuid) 
	cpuid_topo->package_id = cpu_to_node(cpuid);



	/* Some PHYTIUM FT2000PLUS platform firmware has no PPTT table */

	if ((read_cpuid_id() & MIDR_CPU_MODEL_MASK) == MIDR_PHYTIUM_FT2000PLUS

	if ((read_cpuid_id() & MIDR_CPU_MODEL_MASK) == MIDR_FT_2000PLUS

		&& cpu_to_node(cpuid) == NUMA_NO_NODE) {

		cpuid_topo->thread_id  = 0;

		cpuid_topo->package_id = 0;

drivers/iommu/arm/arm-smmu/arm-smmu.c

+26 −6
Original line number Diff line number Diff line
@@ -43,6 +43,9 @@ 


#include "arm-smmu.h"



#ifdef CONFIG_ARCH_PHYTIUM

#include <asm/phytium_machine_types.h>

#endif

/*

 * Apparently, some Qualcomm arm64 platforms which appear to expose their SMMU

 * global register space are still, in fact, using a hypervisor to mediate it
@@ -54,6 +57,7 @@ 


#define MSI_IOVA_BASE			0x8000000

#define MSI_IOVA_LENGTH			0x100000

#define SMR_MASK_SHIFT                  16



static int force_stage;

module_param(force_stage, int, S_IRUGO);
@@ -1372,6 +1376,20 @@ static struct iommu_device *arm_smmu_probe_device(struct device *dev) 
		return ERR_PTR(-ENODEV);

	}



#ifdef CONFIG_ARCH_PHYTIUM

	/* ft2000+ */

	if (typeof_ft2000plus()) {

		int num = fwspec->num_ids;



		for (i = 0; i < num; i++) {

#define FWID_READ(id) (((u16)(id) >> 3) | (((id) >> SMR_MASK_SHIFT | 0x7000) << SMR_MASK_SHIFT))

			u32 fwid = FWID_READ(fwspec->ids[i]);



			iommu_fwspec_add_ids(dev, &fwid, 1);

		}

	}

#endif



	ret = -EINVAL;

	for (i = 0; i < fwspec->num_ids; i++) {

		u16 sid = FIELD_GET(ARM_SMMU_SMR_ID, fwspec->ids[i]);
@@ -1460,6 +1478,12 @@ static struct iommu_group *arm_smmu_device_group(struct device *dev) 
		if (group && smmu->s2crs[idx].group &&

		    group != smmu->s2crs[idx].group)

			return ERR_PTR(-EINVAL);

#ifdef CONFIG_ARCH_PHYTIUM

		if (typeof_s2500())

			break;

		if (typeof_ft2000plus() && !smmu->s2crs[idx].group)

			continue;

#endif



		group = smmu->s2crs[idx].group;

	}
@@ -1585,14 +1609,10 @@ static void arm_smmu_get_resv_regions(struct device *dev, 
	iommu_dma_get_resv_regions(dev, head);

}



#ifdef CONFIG_ARM64

#include <asm/cputype.h>

#ifdef CONFIG_ARCH_PHYTIUM

static bool cpu_using_identity_iommu_domain(struct device *dev)

{

	u32 midr = read_cpuid_id();



	if (((midr & MIDR_CPU_MODEL_MASK) == MIDR_PHYTIUM_FT2000PLUS)

		|| ((midr & MIDR_CPU_MODEL_MASK) == MIDR_PHYTIUM_FT2500))

	if (typeof_ft2000plus() || typeof_s2500())

		return true;



	return false;

drivers/irqchip/irq-gic-v3-its.c

+9 −0
Original line number Diff line number Diff line
@@ -37,6 +37,10 @@ 
#include <asm/cputype.h>

#include <asm/exception.h>



#ifdef CONFIG_ARCH_PHYTIUM

#include <asm/phytium_machine_types.h>

#endif



#include "irq-gic-common.h"



#define ITS_FLAGS_CMDQ_NEEDS_FLUSHING		(1ULL << 0)
@@ -1696,6 +1700,11 @@ static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) 
	msg->address_hi		= upper_32_bits(addr);

	msg->data		= its_get_event_id(d);



#ifdef CONFIG_ARCH_PHYTIUM

	if (typeof_ft2000plus())

		return;

#endif



	iommu_dma_compose_msi_msg(irq_data_get_msi_desc(d), msg);

}