Commit da9ef50f authored by Praneeth Bajjuri's avatar Praneeth Bajjuri Committed by David S. Miller
Browse files

net: phy: dp83867: perform soft reset and retain established link 

Current logic is performing hard reset and causing the programmed
registers to be wiped out.

as per datasheet: https://www.ti.com/lit/ds/symlink/dp83867cr.pdf


8.6.26 Control Register (CTRL)

do SW_RESTART to perform a reset not including the registers,
If performed when link is already present,
it will drop the link and trigger re-auto negotiation.

Signed-off-by: default avatarPraneeth Bajjuri <praneeth@ti.com>
Signed-off-by: default avatarGeet Modi <geet.modi@ti.com>
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 232e3683

drivers/net/phy/dp83867.c

+1 −5
Original line number Diff line number Diff line
@@ -826,16 +826,12 @@ static int dp83867_phy_reset(struct phy_device *phydev) 
{

	int err;



	err = phy_write(phydev, DP83867_CTRL, DP83867_SW_RESET);

	err = phy_write(phydev, DP83867_CTRL, DP83867_SW_RESTART);

	if (err < 0)

		return err;



	usleep_range(10, 20);



	/* After reset FORCE_LINK_GOOD bit is set. Although the

	 * default value should be unset. Disable FORCE_LINK_GOOD

	 * for the phy to work properly.

	 */

	return phy_modify(phydev, MII_DP83867_PHYCTRL,

			 DP83867_PHYCR_FORCE_LINK_GOOD, 0);

}