Commit da43f08d authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

Merge branch 'pci/misc'

- Sort Intel Device IDs by value (Andy Shevchenko)

- Change Capability offsets to hex to match spec (Baruch Siach)

- Correct misspellings (Krzysztof Wilczyński)

- Terminate statement with semicolon in pci_endpoint_test.c (Ming Wang)

* pci/misc:
  misc: pci_endpoint_test: Terminate statement with semicolon
  PCI: Correct misspelled words
  PCI: Change capability register offsets to hex
  PCI: Sort Intel Device IDs by value
parents 2709f033 560dbc46
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+1 −1
Original line number Diff line number Diff line
@@ -865,7 +865,7 @@ static int pci_endpoint_test_probe(struct pci_dev *pdev,
		goto err_release_irq;
	}
	misc_device->parent = &pdev->dev;
	misc_device->fops = &pci_endpoint_test_fops,
	misc_device->fops = &pci_endpoint_test_fops;

	err = misc_register(misc_device);
	if (err) {
+1 −1
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@@ -310,7 +310,7 @@ struct cdns_pcie {
 *            single function at a time
 * @vendor_id: PCI vendor ID
 * @device_id: PCI device ID
 * @avail_ib_bar: Satus of RP_BAR0, RP_BAR1 and	RP_NO_BAR if it's free or
 * @avail_ib_bar: Status of RP_BAR0, RP_BAR1 and RP_NO_BAR if it's free or
 *                available
 * @quirk_retrain_flag: Retrain link as quirk for PCIe Gen2
 * @quirk_detect_quiet_flag: LTSSM Detect Quiet min delay set as quirk
+1 −1
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@@ -311,7 +311,7 @@ static int mtk_pcie_startup_port(struct mtk_pcie_port *port)
	writel_relaxed(val, port->base + PCIE_RST_CTRL_REG);

	/*
	 * Described in PCIe CEM specification setctions 2.2 (PERST# Signal)
	 * Described in PCIe CEM specification sections 2.2 (PERST# Signal)
	 * and 2.2.1 (Initial Power-Up (G3 to S0)).
	 * The deassertion of PERST# should be delayed 100ms (TPVPERL)
	 * for the power and clock to become stable.
+1 −1
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@@ -1262,7 +1262,7 @@ static void epf_ntb_db_mw_bar_cleanup(struct epf_ntb *ntb,
}

/**
 * epf_ntb_configure_interrupt() - Configure MSI/MSI-X capaiblity
 * epf_ntb_configure_interrupt() - Configure MSI/MSI-X capability
 * @ntb: NTB device that facilitates communication between HOST1 and HOST2
 * @type: PRIMARY interface or SECONDARY interface
 *
+1 −1
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@@ -247,7 +247,7 @@ void of_pci_check_probe_only(void)
	else
		pci_clear_flags(PCI_PROBE_ONLY);

	pr_info("PROBE_ONLY %sabled\n", val ? "en" : "dis");
	pr_info("PROBE_ONLY %s\n", val ? "enabled" : "disabled");
}
EXPORT_SYMBOL_GPL(of_pci_check_probe_only);

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