Commit d9d005f3 authored by Thomas Gleixner's avatar Thomas Gleixner Committed by Borislav Petkov
Browse files

x86/fpu: Move mxcsr related code to core 



No need to expose that to code which only needs the XCR0 accessors.

Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/20211015011539.740012411@linutronix.de
parent 9848fb96

arch/x86/include/asm/fpu/xcr.h

+0 −11
Original line number Diff line number Diff line
@@ -2,17 +2,6 @@ 
#ifndef _ASM_X86_FPU_XCR_H

#define _ASM_X86_FPU_XCR_H



/*

 * MXCSR and XCR definitions:

 */



static inline void ldmxcsr(u32 mxcsr)

{

	asm volatile("ldmxcsr %0" :: "m" (mxcsr));

}



extern unsigned int mxcsr_feature_mask;



#define XCR_XFEATURE_ENABLED_MASK	0x00000000



static inline u64 xgetbv(u32 index)

arch/x86/kernel/fpu/init.c

+1 −0
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@ 
#include <linux/init.h>



#include "internal.h"

#include "legacy.h"



/*

 * Initialize the registers found in all CPUs, CR0 and CR4:

arch/x86/kernel/fpu/legacy.h

+7 −0
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@@ -4,6 +4,13 @@ 


#include <asm/fpu/types.h>



extern unsigned int mxcsr_feature_mask;



static inline void ldmxcsr(u32 mxcsr)

{

	asm volatile("ldmxcsr %0" :: "m" (mxcsr));

}



/*

 * Returns 0 on success or the trap number when the operation raises an

 * exception.

arch/x86/kernel/fpu/regset.c

+1 −0
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@ 


#include "context.h"

#include "internal.h"

#include "legacy.h"



/*

 * The xstateregs_active() routine is the same as the regset_fpregs_active() routine,

arch/x86/kernel/fpu/xstate.c

+2 −1
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@@ -14,8 +14,9 @@ 


#include <asm/fpu/api.h>

#include <asm/fpu/internal.h>

#include <asm/fpu/signal.h>

#include <asm/fpu/regset.h>

#include <asm/fpu/signal.h>

#include <asm/fpu/xcr.h>



#include <asm/tlbflush.h>