Commit d9c8316e authored by Evan Quan's avatar Evan Quan Committed by Alex Deucher
Browse files

drm/amd/powerplay: avoid calling SMU7 specific SMU message implemention 



Prepare for coming lock protection for SMU message issuing.

Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
Reviewed-by: default avatarKenneth Feng <kenneth.feng@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 22ecc966

drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

+5 −5
Original line number Diff line number Diff line
@@ -3496,7 +3496,7 @@ static int smu7_get_gpu_power(struct pp_hwmgr *hwmgr, u32 *query) 
	    (adev->asic_type != CHIP_FIJI) &&

	    (adev->asic_type != CHIP_TONGA)) {

		smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_GetCurrPkgPwr, 0);

		tmp = cgs_read_register(hwmgr->device, mmSMC_MSG_ARG_0);

		tmp = smum_get_argument(hwmgr);

		*query = tmp;



		if (tmp != 0)
@@ -3535,13 +3535,13 @@ static int smu7_read_sensor(struct pp_hwmgr *hwmgr, int idx, 
	switch (idx) {

	case AMDGPU_PP_SENSOR_GFX_SCLK:

		smum_send_msg_to_smc(hwmgr, PPSMC_MSG_API_GetSclkFrequency);

		sclk = cgs_read_register(hwmgr->device, mmSMC_MSG_ARG_0);

		sclk = smum_get_argument(hwmgr);

		*((uint32_t *)value) = sclk;

		*size = 4;

		return 0;

	case AMDGPU_PP_SENSOR_GFX_MCLK:

		smum_send_msg_to_smc(hwmgr, PPSMC_MSG_API_GetMclkFrequency);

		mclk = cgs_read_register(hwmgr->device, mmSMC_MSG_ARG_0);

		mclk = smum_get_argument(hwmgr);

		*((uint32_t *)value) = mclk;

		*size = 4;

		return 0;
@@ -4455,7 +4455,7 @@ static int smu7_print_clock_levels(struct pp_hwmgr *hwmgr, 
	switch (type) {

	case PP_SCLK:

		smum_send_msg_to_smc(hwmgr, PPSMC_MSG_API_GetSclkFrequency);

		clock = cgs_read_register(hwmgr->device, mmSMC_MSG_ARG_0);

		clock = smum_get_argument(hwmgr);



		for (i = 0; i < sclk_table->count; i++) {

			if (clock > sclk_table->dpm_levels[i].value)
@@ -4471,7 +4471,7 @@ static int smu7_print_clock_levels(struct pp_hwmgr *hwmgr, 
		break;

	case PP_MCLK:

		smum_send_msg_to_smc(hwmgr, PPSMC_MSG_API_GetMclkFrequency);

		clock = cgs_read_register(hwmgr->device, mmSMC_MSG_ARG_0);

		clock = smum_get_argument(hwmgr);



		for (i = 0; i < mclk_table->count; i++) {

			if (clock > mclk_table->dpm_levels[i].value)

drivers/gpu/drm/amd/powerplay/hwmgr/smu7_thermal.c

+4 −4
Original line number Diff line number Diff line
@@ -151,8 +151,8 @@ int smu7_fan_ctrl_start_smc_fan_control(struct pp_hwmgr *hwmgr) 
	int result;



	if (PP_CAP(PHM_PlatformCaps_ODFuzzyFanControlSupport)) {

		cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, FAN_CONTROL_FUZZY);

		result = smum_send_msg_to_smc(hwmgr, PPSMC_StartFanControl);

		result = smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_StartFanControl,

					FAN_CONTROL_FUZZY);



		if (PP_CAP(PHM_PlatformCaps_FanSpeedInTableIsRPM))

			hwmgr->hwmgr_func->set_max_fan_rpm_output(hwmgr,
@@ -164,8 +164,8 @@ int smu7_fan_ctrl_start_smc_fan_control(struct pp_hwmgr *hwmgr) 
					advanceFanControlParameters.usMaxFanPWM);



	} else {

		cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, FAN_CONTROL_TABLE);

		result = smum_send_msg_to_smc(hwmgr, PPSMC_StartFanControl);

		result = smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_StartFanControl,

					FAN_CONTROL_TABLE);

	}



	if (!result && hwmgr->thermal_controller.

drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c

+3 −4
Original line number Diff line number Diff line
@@ -137,9 +137,7 @@ static int fiji_start_smu_in_protection_mode(struct pp_hwmgr *hwmgr) 
	PHM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, SMC_IND, RCU_UC_EVENTS,

			INTERRUPTS_ENABLED, 1);



	cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, 0x20000);

	cgs_write_register(hwmgr->device, mmSMC_MESSAGE_0, PPSMC_MSG_Test);

	PHM_WAIT_FIELD_UNEQUAL(hwmgr, SMC_RESP_0, SMC_RESP, 0);

	smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_Test, 0x20000);



	/* Wait for done bit to be set */

	PHM_WAIT_VFPF_INDIRECT_FIELD_UNEQUAL(hwmgr, SMC_IND,
@@ -203,7 +201,7 @@ static int fiji_start_avfs_btc(struct pp_hwmgr *hwmgr) 
	struct smu7_smumgr *smu_data = (struct smu7_smumgr *)(hwmgr->smu_backend);



	if (0 != smu_data->avfs_btc_param) {

		if (0 != smu7_send_msg_to_smc_with_parameter(hwmgr,

		if (0 != smum_send_msg_to_smc_with_parameter(hwmgr,

				PPSMC_MSG_PerformBtc, smu_data->avfs_btc_param)) {

			pr_info("[AVFS][Fiji_PerformBtc] PerformBTC SMU msg failed");

			result = -EINVAL;
@@ -2649,6 +2647,7 @@ const struct pp_smumgr_func fiji_smu_funcs = { 
	.request_smu_load_specific_fw = NULL,

	.send_msg_to_smc = &smu7_send_msg_to_smc,

	.send_msg_to_smc_with_parameter = &smu7_send_msg_to_smc_with_parameter,

	.get_argument = smu7_get_argument,

	.download_pptable_settings = NULL,

	.upload_pptable_settings = NULL,

	.update_smc_table = fiji_update_smc_table,

drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c

+1 −0
Original line number Diff line number Diff line
@@ -2669,6 +2669,7 @@ const struct pp_smumgr_func iceland_smu_funcs = { 
	.request_smu_load_specific_fw = &iceland_request_smu_load_specific_fw,

	.send_msg_to_smc = &smu7_send_msg_to_smc,

	.send_msg_to_smc_with_parameter = &smu7_send_msg_to_smc_with_parameter,

	.get_argument = smu7_get_argument,

	.download_pptable_settings = NULL,

	.upload_pptable_settings = NULL,

	.get_offsetof = iceland_get_offsetof,

drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c

+2 −1
Original line number Diff line number Diff line
@@ -99,7 +99,7 @@ static int polaris10_perform_btc(struct pp_hwmgr *hwmgr) 
	struct smu7_smumgr *smu_data = (struct smu7_smumgr *)(hwmgr->smu_backend);



	if (0 != smu_data->avfs_btc_param) {

		if (0 != smu7_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_PerformBtc, smu_data->avfs_btc_param)) {

		if (0 != smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_PerformBtc, smu_data->avfs_btc_param)) {

			pr_info("[AVFS][SmuPolaris10_PerformBtc] PerformBTC SMU msg failed");

			result = -1;

		}
@@ -2565,6 +2565,7 @@ const struct pp_smumgr_func polaris10_smu_funcs = { 
	.request_smu_load_specific_fw = NULL,

	.send_msg_to_smc = smu7_send_msg_to_smc,

	.send_msg_to_smc_with_parameter = smu7_send_msg_to_smc_with_parameter,

	.get_argument = smu7_get_argument,

	.download_pptable_settings = NULL,

	.upload_pptable_settings = NULL,

	.update_smc_table = polaris10_update_smc_table,