Commit d96c5ed0 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Rename PLANE_CUS_CTL Y plane bits

parent 62f887ae
Loading
Loading
Loading
Loading
+4 −4
Original line number Diff line number Diff line
@@ -5167,13 +5167,13 @@ static int icl_check_nv12_planes(struct intel_crtc_state *crtc_state)

		if (icl_is_hdr_plane(dev_priv, plane->id)) {
			if (linked->id == PLANE_SPRITE5)
				plane_state->cus_ctl |= PLANE_CUS_PLANE_7;
				plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_7_ICL;
			else if (linked->id == PLANE_SPRITE4)
				plane_state->cus_ctl |= PLANE_CUS_PLANE_6;
				plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_6_ICL;
			else if (linked->id == PLANE_SPRITE3)
				plane_state->cus_ctl |= PLANE_CUS_PLANE_5_RKL;
				plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_5_RKL;
			else if (linked->id == PLANE_SPRITE2)
				plane_state->cus_ctl |= PLANE_CUS_PLANE_4_RKL;
				plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_4_RKL;
			else
				MISSING_CASE(linked->id);
		}
+4 −4
Original line number Diff line number Diff line
@@ -7254,10 +7254,10 @@ enum {
#define _PLANE_CUS_CTL_1_A			0x701c8
#define _PLANE_CUS_CTL_2_A			0x702c8
#define  PLANE_CUS_ENABLE			(1 << 31)
#define  PLANE_CUS_PLANE_4_RKL			(0 << 30)
#define  PLANE_CUS_PLANE_5_RKL			(1 << 30)
#define  PLANE_CUS_PLANE_6			(0 << 30)
#define  PLANE_CUS_PLANE_7			(1 << 30)
#define  PLANE_CUS_Y_PLANE_4_RKL		(0 << 30)
#define  PLANE_CUS_Y_PLANE_5_RKL		(1 << 30)
#define  PLANE_CUS_Y_PLANE_6_ICL		(0 << 30)
#define  PLANE_CUS_Y_PLANE_7_ICL		(1 << 30)
#define  PLANE_CUS_HPHASE_SIGN_NEGATIVE		(1 << 19)
#define  PLANE_CUS_HPHASE_0			(0 << 16)
#define  PLANE_CUS_HPHASE_0_25			(1 << 16)