Commit d957b51f authored by Hariprasad Kelam's avatar Hariprasad Kelam Committed by David S. Miller
Browse files

octeontx2-af: Don't enable Pause frames by default 



Current implementation is such that 802.3x pause frames are
enabled by default.  As CGX and RPM blocks support PFC
(priority flow control) also, instead of driver enabling one
between them enable them upon request from PF or its VFs.
Also add support to disable pause frames in driver unbind.

Signed-off-by: default avatarHariprasad Kelam <hkelam@marvell.com>
Signed-off-by: default avatarSunil Kovvuri Goutham <sgoutham@marvell.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent b4f029f4

drivers/net/ethernet/marvell/octeontx2/af/cgx.c

+14 −27
Original line number Diff line number Diff line
@@ -782,21 +782,8 @@ static void cgx_lmac_pause_frm_config(void *cgxd, int lmac_id, bool enable) 


	if (!is_lmac_valid(cgx, lmac_id))

		return;

	if (enable) {

		/* Enable receive pause frames */

		cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL);

		cfg |= CGX_SMUX_RX_FRM_CTL_CTL_BCK;

		cgx_write(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL, cfg);



		cfg = cgx_read(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL);

		cfg |= CGX_GMP_GMI_RXX_FRM_CTL_CTL_BCK;

		cgx_write(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL, cfg);



		/* Enable pause frames transmission */

		cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_TX_CTL);

		cfg |= CGX_SMUX_TX_CTL_L2P_BP_CONV;

		cgx_write(cgx, lmac_id, CGXX_SMUX_TX_CTL, cfg);



	if (enable) {

		/* Set pause time and interval */

		cgx_write(cgx, lmac_id, CGXX_SMUX_TX_PAUSE_PKT_TIME,

			  DEFAULT_PAUSE_TIME);
@@ -813,7 +800,8 @@ static void cgx_lmac_pause_frm_config(void *cgxd, int lmac_id, bool enable) 
		cfg &= ~0xFFFFULL;

		cgx_write(cgx, lmac_id, CGXX_GMP_GMI_TX_PAUSE_PKT_INTERVAL,

			  cfg | (DEFAULT_PAUSE_TIME / 2));

	} else {

	}



	/* ALL pause frames received are completely ignored */

	cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL);

	cfg &= ~CGX_SMUX_RX_FRM_CTL_CTL_BCK;
@@ -828,7 +816,6 @@ static void cgx_lmac_pause_frm_config(void *cgxd, int lmac_id, bool enable) 
	cfg &= ~CGX_SMUX_TX_CTL_L2P_BP_CONV;

	cgx_write(cgx, lmac_id, CGXX_SMUX_TX_CTL, cfg);

}

}



void cgx_lmac_ptp_config(void *cgxd, int lmac_id, bool enable)

{

drivers/net/ethernet/marvell/octeontx2/af/rpm.c

+13 −34
Original line number Diff line number Diff line
@@ -167,26 +167,6 @@ void rpm_lmac_pause_frm_config(void *rpmd, int lmac_id, bool enable) 
	u64 cfg;



	if (enable) {

		/* Enable 802.3 pause frame mode */

		cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);

		cfg &= ~RPMX_MTI_MAC100X_COMMAND_CONFIG_PFC_MODE;

		rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg);



		/* Enable receive pause frames */

		cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);

		cfg &= ~RPMX_MTI_MAC100X_COMMAND_CONFIG_RX_P_DISABLE;

		rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg);



		/* Enable forward pause to TX block */

		cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);

		cfg &= ~RPMX_MTI_MAC100X_COMMAND_CONFIG_PAUSE_IGNORE;

		rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg);



		/* Enable pause frames transmission */

		cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);

		cfg &= ~RPMX_MTI_MAC100X_COMMAND_CONFIG_TX_P_DISABLE;

		rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg);



		/* Set pause time and interval */

		cfg = rpm_read(rpm, lmac_id,

			       RPMX_MTI_MAC100X_CL01_PAUSE_QUANTA);
@@ -199,8 +179,8 @@ void rpm_lmac_pause_frm_config(void *rpmd, int lmac_id, bool enable) 
		cfg &= ~0xFFFFULL;

		rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_CL01_QUANTA_THRESH,

			  cfg | (RPM_DEFAULT_PAUSE_TIME / 2));

	}



	} else {

	/* ALL pause frames received are completely ignored */

	cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);

	cfg |= RPMX_MTI_MAC100X_COMMAND_CONFIG_RX_P_DISABLE;
@@ -216,7 +196,6 @@ void rpm_lmac_pause_frm_config(void *rpmd, int lmac_id, bool enable) 
	cfg |= RPMX_MTI_MAC100X_COMMAND_CONFIG_TX_P_DISABLE;

	rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg);

}

}



int rpm_get_rx_stats(void *rpmd, int lmac_id, int idx, u64 *rx_stat)

{

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

+0 −8
Original line number Diff line number Diff line
@@ -296,7 +296,6 @@ static int nix_interface_init(struct rvu *rvu, u16 pcifunc, int type, int nixlf, 
	struct rvu_hwinfo *hw = rvu->hw;

	struct sdp_node_info *sdp_info;

	int pkind, pf, vf, lbkid, vfid;

	struct mac_ops *mac_ops;

	u8 cgx_id, lmac_id;

	bool from_vf;

	int err;
@@ -326,13 +325,6 @@ static int nix_interface_init(struct rvu *rvu, u16 pcifunc, int type, int nixlf, 
		cgx_set_pkind(rvu_cgx_pdata(cgx_id, rvu), lmac_id, pkind);

		rvu_npc_set_pkind(rvu, pkind, pfvf);



		mac_ops = get_mac_ops(rvu_cgx_pdata(cgx_id, rvu));



		/* By default we enable pause frames */

		if ((pcifunc & RVU_PFVF_FUNC_MASK) == 0)

			mac_ops->mac_enadis_pause_frm(rvu_cgx_pdata(cgx_id,

								    rvu),

						      lmac_id, true, true);

		break;

	case NIX_INTF_TYPE_LBK:

		vf = (pcifunc & RVU_PFVF_FUNC_MASK) - 1;

drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c

+1 −0
Original line number Diff line number Diff line
@@ -269,6 +269,7 @@ int otx2_config_pause_frm(struct otx2_nic *pfvf) 
	mutex_unlock(&pfvf->mbox.lock);

	return err;

}

EXPORT_SYMBOL(otx2_config_pause_frm);



int otx2_set_flowkey_cfg(struct otx2_nic *pfvf)

{

drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c

+8 −7
Original line number Diff line number Diff line
@@ -1697,9 +1697,6 @@ int otx2_open(struct net_device *netdev) 
	if (pf->linfo.link_up && !(pf->pcifunc & RVU_PFVF_FUNC_MASK))

		otx2_handle_link_event(pf);



	/* Restore pause frame settings */

	otx2_config_pause_frm(pf);



	/* Install DMAC Filters */

	if (pf->flags & OTX2_FLAG_DMACFLTR_SUPPORT)

		otx2_dmacflt_reinstall_flows(pf);
@@ -2782,10 +2779,6 @@ static int otx2_probe(struct pci_dev *pdev, const struct pci_device_id *id) 
	/* Enable link notifications */

	otx2_cgx_config_linkevents(pf, true);



	/* Enable pause frames by default */

	pf->flags |= OTX2_FLAG_RX_PAUSE_ENABLED;

	pf->flags |= OTX2_FLAG_TX_PAUSE_ENABLED;



	return 0;



err_pf_sriov_init:
@@ -2929,6 +2922,14 @@ static void otx2_remove(struct pci_dev *pdev) 
	if (pf->flags & OTX2_FLAG_RX_TSTAMP_ENABLED)

		otx2_config_hw_rx_tstamp(pf, false);



	/* Disable 802.3x pause frames */

	if (pf->flags & OTX2_FLAG_RX_PAUSE_ENABLED ||

	    (pf->flags & OTX2_FLAG_TX_PAUSE_ENABLED)) {

		pf->flags &= ~OTX2_FLAG_RX_PAUSE_ENABLED;

		pf->flags &= ~OTX2_FLAG_TX_PAUSE_ENABLED;

		otx2_config_pause_frm(pf);

	}



	cancel_work_sync(&pf->reset_task);

	/* Disable link notifications */

	otx2_cgx_config_linkevents(pf, false);