Commit d92aabe2 authored by Ofir Bitton's avatar Ofir Bitton Committed by Zheng Zengkai
Browse files

habanalabs: zero pci counters packet before submit to FW 



stable inclusion
from stable-5.10.14
commit 4439d22c3758df25bb70243e0171e9728582f2a8
bugzilla: 48051

--------------------------------

[ Upstream commit 9354f1b4 ]

Driver does not zero some pci counters packets before sending
to FW. This causes an out of sync PI/CI between driver and FW.

Signed-off-by: default avatarOfir Bitton <obitton@habana.ai>
Reviewed-by: default avatarOded Gabbay <ogabbay@kernel.org>
Signed-off-by: default avatarOded Gabbay <ogabbay@kernel.org>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
Signed-off-by: default avatarZheng Zengkai <zhengzengkai@huawei.com>
Acked-by: default avatarXie XiuQi <xiexiuqi@huawei.com>
parent b6c04b17

drivers/misc/habanalabs/common/firmware_if.c

+5 −0
Original line number Diff line number Diff line
@@ -385,6 +385,10 @@ int hl_fw_cpucp_pci_counters_get(struct hl_device *hdev, 
	}

	counters->rx_throughput = result;



	memset(&pkt, 0, sizeof(pkt));

	pkt.ctl = cpu_to_le32(CPUCP_PACKET_PCIE_THROUGHPUT_GET <<

			CPUCP_PKT_CTL_OPCODE_SHIFT);



	/* Fetch PCI tx counter */

	pkt.index = cpu_to_le32(cpucp_pcie_throughput_tx);

	rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
@@ -397,6 +401,7 @@ int hl_fw_cpucp_pci_counters_get(struct hl_device *hdev, 
	counters->tx_throughput = result;



	/* Fetch PCI replay counter */

	memset(&pkt, 0, sizeof(pkt));

	pkt.ctl = cpu_to_le32(CPUCP_PACKET_PCIE_REPLAY_CNT_GET <<

			CPUCP_PKT_CTL_OPCODE_SHIFT);