Commit d90a53d6 authored by Prike Liang's avatar Prike Liang Committed by Alex Deucher
Browse files

drm/amdgpu: add amdgpu_gfx_state_change_set() set gfx power change entry (v2) 



The new amdgpu_gfx_state_change_set() funtion can support set GFX power
change status to D0/D3.

v2: squash in warning fix (Alex)

Signed-off-by: default avatarPrike Liang <Prike.Liang@amd.com>
Acked-by: default avatarHuang Rui <ray.huang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 4cd078dc

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

+20 −0
Original line number Diff line number Diff line
@@ -819,3 +819,23 @@ int amdgpu_gfx_get_num_kcq(struct amdgpu_device *adev) 
	}

	return amdgpu_num_kcq;

}



/* amdgpu_gfx_state_change_set - Handle gfx power state change set

 * @adev: amdgpu_device pointer

 * @state: gfx power state(1 -sGpuChangeState_D0Entry and 2 -sGpuChangeState_D3Entry)

 *

 */



void amdgpu_gfx_state_change_set(struct amdgpu_device *adev, enum gfx_change_state state)

{



	mutex_lock(&adev->pm.mutex);



	if (adev->powerplay.pp_funcs &&

	    adev->powerplay.pp_funcs->gfx_state_change_set)

			((adev)->powerplay.pp_funcs->gfx_state_change_set(

					(adev)->powerplay.pp_handle, state));



	mutex_unlock(&adev->pm.mutex);



}

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h

+7 −0
Original line number Diff line number Diff line
@@ -47,6 +47,12 @@ enum gfx_pipe_priority { 
	AMDGPU_GFX_PIPE_PRIO_MAX

};



/* Argument for PPSMC_MSG_GpuChangeState */

enum gfx_change_state {

	sGpuChangeState_D0Entry = 1,

	sGpuChangeState_D3Entry,

};



#define AMDGPU_GFX_QUEUE_PRIORITY_MINIMUM  0

#define AMDGPU_GFX_QUEUE_PRIORITY_MAXIMUM  15
@@ -394,4 +400,5 @@ int amdgpu_gfx_cp_ecc_error_irq(struct amdgpu_device *adev, 
uint32_t amdgpu_kiq_rreg(struct amdgpu_device *adev, uint32_t reg);

void amdgpu_kiq_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v);

int amdgpu_gfx_get_num_kcq(struct amdgpu_device *adev);

void amdgpu_gfx_state_change_set(struct amdgpu_device *adev, enum gfx_change_state state);

#endif

drivers/gpu/drm/amd/include/kgd_pp_interface.h

+1 −0
Original line number Diff line number Diff line
@@ -285,6 +285,7 @@ struct amd_pm_funcs { 
	int (*odn_edit_dpm_table)(void *handle, uint32_t type, long *input, uint32_t size);

	int (*set_mp1_state)(void *handle, enum pp_mp1_state mp1_state);

	int (*smu_i2c_bus_access)(void *handle, bool acquire);

	int (*gfx_state_change_set)(void *handle, uint32_t state);

/* export to DC */

	u32 (*get_sclk)(void *handle, bool low);

	u32 (*get_mclk)(void *handle, bool low);

drivers/gpu/drm/amd/pm/inc/hwmgr.h

+1 −0
Original line number Diff line number Diff line
@@ -366,6 +366,7 @@ struct pp_hwmgr_func { 
	int (*disable_power_features_for_compute_performance)(struct pp_hwmgr *hwmgr,

					bool disable);

	ssize_t (*get_gpu_metrics)(struct pp_hwmgr *hwmgr, void **table);

	int (*gfx_state_change)(struct pp_hwmgr *hwmgr, uint32_t state);

};



struct pp_table_func {

drivers/gpu/drm/amd/pm/inc/rv_ppsmc.h

+2 −1
Original line number Diff line number Diff line
@@ -83,7 +83,8 @@ 
#define PPSMC_MSG_SetSoftMaxVcn                 0x34

#define PPSMC_MSG_PowerGateMmHub                0x35

#define PPSMC_MSG_SetRccPfcPmeRestoreRegister   0x36

#define PPSMC_Message_Count                     0x37

#define PPSMC_MSG_GpuChangeState                0x37

#define PPSMC_Message_Count                     0x42



typedef uint16_t PPSMC_Result;

typedef int      PPSMC_Msg;