Commit d904c8cc authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'net-5.18-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net 

Pull networking fixes from Paolo Abeni:
 "Including fixes from can, xfrm and netfilter subtrees.

  Notably this reverts a recent TCP/DCCP netns-related change to address
  a possible UaF.

  Current release - regressions:

   - tcp: revert "tcp/dccp: get rid of inet_twsk_purge()"

   - xfrm: set dst dev to blackhole_netdev instead of loopback_dev in
     ifdown

  Previous releases - regressions:

   - netfilter: flowtable: fix TCP flow teardown

   - can: revert "can: m_can: pci: use custom bit timings for Elkhart
     Lake"

   - xfrm: check encryption module availability consistency

   - eth: vmxnet3: fix possible use-after-free bugs in
     vmxnet3_rq_alloc_rx_buf()

   - eth: mlx5: initialize flow steering during driver probe

   - eth: ice: fix crash when writing timestamp on RX rings

  Previous releases - always broken:

   - mptcp: fix checksum byte order

   - eth: lan966x: fix assignment of the MAC address

   - eth: mlx5: remove HW-GRO from reported features

   - eth: ftgmac100: disable hardware checksum on AST2600"

* tag 'net-5.18-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net: (50 commits)
  net: bridge: Clear offload_fwd_mark when passing frame up bridge interface.
  ptp: ocp: change sysfs attr group handling
  selftests: forwarding: fix missing backslash
  netfilter: nf_tables: disable expression reduction infra
  netfilter: flowtable: move dst_check to packet path
  netfilter: flowtable: fix TCP flow teardown
  net: ftgmac100: Disable hardware checksum on AST2600
  igb: skip phy status check where unavailable
  nfc: pn533: Fix buggy cleanup order
  mptcp: Do TCP fallback on early DSS checksum failure
  mptcp: fix checksum byte order
  net: af_key: check encryption module availability consistency
  net: af_key: add check for pfkey_broadcast in function pfkey_process
  net/mlx5: Drain fw_reset when removing device
  net/mlx5e: CT: Fix setting flow_source for smfs ct tuples
  net/mlx5e: CT: Fix support for GRE tuples
  net/mlx5e: Remove HW-GRO from reported features
  net/mlx5e: Properly block HW GRO when XDP is enabled
  net/mlx5e: Properly block LRO when XDP is enabled
  net/mlx5e: Block rx-gro-hw feature in switchdev mode
  ...
parents f993aed4 fbb3abdf

drivers/net/can/m_can/m_can.c

+6 −18
Original line number Diff line number Diff line
@@ -1495,34 +1495,22 @@ static int m_can_dev_setup(struct m_can_classdev *cdev) 
		err = can_set_static_ctrlmode(dev, CAN_CTRLMODE_FD_NON_ISO);

		if (err)

			return err;

		cdev->can.bittiming_const = cdev->bit_timing ?

			cdev->bit_timing : &m_can_bittiming_const_30X;



		cdev->can.data_bittiming_const = cdev->data_timing ?

			cdev->data_timing :

			&m_can_data_bittiming_const_30X;

		cdev->can.bittiming_const = &m_can_bittiming_const_30X;

		cdev->can.data_bittiming_const = &m_can_data_bittiming_const_30X;

		break;

	case 31:

		/* CAN_CTRLMODE_FD_NON_ISO is fixed with M_CAN IP v3.1.x */

		err = can_set_static_ctrlmode(dev, CAN_CTRLMODE_FD_NON_ISO);

		if (err)

			return err;

		cdev->can.bittiming_const = cdev->bit_timing ?

			cdev->bit_timing : &m_can_bittiming_const_31X;



		cdev->can.data_bittiming_const = cdev->data_timing ?

			cdev->data_timing :

			&m_can_data_bittiming_const_31X;

		cdev->can.bittiming_const = &m_can_bittiming_const_31X;

		cdev->can.data_bittiming_const = &m_can_data_bittiming_const_31X;

		break;

	case 32:

	case 33:

		/* Support both MCAN version v3.2.x and v3.3.0 */

		cdev->can.bittiming_const = cdev->bit_timing ?

			cdev->bit_timing : &m_can_bittiming_const_31X;



		cdev->can.data_bittiming_const = cdev->data_timing ?

			cdev->data_timing :

			&m_can_data_bittiming_const_31X;

		cdev->can.bittiming_const = &m_can_bittiming_const_31X;

		cdev->can.data_bittiming_const = &m_can_data_bittiming_const_31X;



		cdev->can.ctrlmode_supported |=

			(m_can_niso_supported(cdev) ?

drivers/net/can/m_can/m_can.h

+0 −3
Original line number Diff line number Diff line
@@ -85,9 +85,6 @@ struct m_can_classdev { 
	struct sk_buff *tx_skb;

	struct phy *transceiver;



	const struct can_bittiming_const *bit_timing;

	const struct can_bittiming_const *data_timing;



	struct m_can_ops *ops;



	int version;

drivers/net/can/m_can/m_can_pci.c

+4 −44
Original line number Diff line number Diff line
@@ -18,14 +18,9 @@ 


#define M_CAN_PCI_MMIO_BAR		0



#define M_CAN_CLOCK_FREQ_EHL		200000000

#define CTL_CSR_INT_CTL_OFFSET		0x508



struct m_can_pci_config {

	const struct can_bittiming_const *bit_timing;

	const struct can_bittiming_const *data_timing;

	unsigned int clock_freq;

};



struct m_can_pci_priv {

	struct m_can_classdev cdev;
@@ -89,40 +84,9 @@ static struct m_can_ops m_can_pci_ops = { 
	.read_fifo = iomap_read_fifo,

};



static const struct can_bittiming_const m_can_bittiming_const_ehl = {

	.name = KBUILD_MODNAME,

	.tseg1_min = 2,		/* Time segment 1 = prop_seg + phase_seg1 */

	.tseg1_max = 64,

	.tseg2_min = 1,		/* Time segment 2 = phase_seg2 */

	.tseg2_max = 128,

	.sjw_max = 128,

	.brp_min = 1,

	.brp_max = 512,

	.brp_inc = 1,

};



static const struct can_bittiming_const m_can_data_bittiming_const_ehl = {

	.name = KBUILD_MODNAME,

	.tseg1_min = 2,		/* Time segment 1 = prop_seg + phase_seg1 */

	.tseg1_max = 16,

	.tseg2_min = 1,		/* Time segment 2 = phase_seg2 */

	.tseg2_max = 8,

	.sjw_max = 4,

	.brp_min = 1,

	.brp_max = 32,

	.brp_inc = 1,

};



static const struct m_can_pci_config m_can_pci_ehl = {

	.bit_timing = &m_can_bittiming_const_ehl,

	.data_timing = &m_can_data_bittiming_const_ehl,

	.clock_freq = 200000000,

};



static int m_can_pci_probe(struct pci_dev *pci, const struct pci_device_id *id)

{

	struct device *dev = &pci->dev;

	const struct m_can_pci_config *cfg;

	struct m_can_classdev *mcan_class;

	struct m_can_pci_priv *priv;

	void __iomem *base;
@@ -150,8 +114,6 @@ static int m_can_pci_probe(struct pci_dev *pci, const struct pci_device_id *id) 
	if (!mcan_class)

		return -ENOMEM;



	cfg = (const struct m_can_pci_config *)id->driver_data;



	priv = cdev_to_priv(mcan_class);



	priv->base = base;
@@ -163,9 +125,7 @@ static int m_can_pci_probe(struct pci_dev *pci, const struct pci_device_id *id) 
	mcan_class->dev = &pci->dev;

	mcan_class->net->irq = pci_irq_vector(pci, 0);

	mcan_class->pm_clock_support = 1;

	mcan_class->bit_timing = cfg->bit_timing;

	mcan_class->data_timing = cfg->data_timing;

	mcan_class->can.clock.freq = cfg->clock_freq;

	mcan_class->can.clock.freq = id->driver_data;

	mcan_class->ops = &m_can_pci_ops;



	pci_set_drvdata(pci, mcan_class);
@@ -218,8 +178,8 @@ static SIMPLE_DEV_PM_OPS(m_can_pci_pm_ops, 
			 m_can_pci_suspend, m_can_pci_resume);



static const struct pci_device_id m_can_pci_id_table[] = {

	{ PCI_VDEVICE(INTEL, 0x4bc1), (kernel_ulong_t)&m_can_pci_ehl, },

	{ PCI_VDEVICE(INTEL, 0x4bc2), (kernel_ulong_t)&m_can_pci_ehl, },

	{ PCI_VDEVICE(INTEL, 0x4bc1), M_CAN_CLOCK_FREQ_EHL, },

	{ PCI_VDEVICE(INTEL, 0x4bc2), M_CAN_CLOCK_FREQ_EHL, },

	{  }	/* Terminating Entry */

};

MODULE_DEVICE_TABLE(pci, m_can_pci_id_table);

drivers/net/ethernet/broadcom/bcmsysport.c

+4 −2
Original line number Diff line number Diff line
@@ -2585,8 +2585,10 @@ static int bcm_sysport_probe(struct platform_device *pdev) 
		device_set_wakeup_capable(&pdev->dev, 1);



	priv->wol_clk = devm_clk_get_optional(&pdev->dev, "sw_sysportwol");

	if (IS_ERR(priv->wol_clk))

		return PTR_ERR(priv->wol_clk);

	if (IS_ERR(priv->wol_clk)) {

		ret = PTR_ERR(priv->wol_clk);

		goto err_deregister_fixed_link;

	}



	/* Set the needed headroom once and for all */

	BUILD_BUG_ON(sizeof(struct bcm_tsb) != 8);

drivers/net/ethernet/cadence/macb_main.c

+1 −1
Original line number Diff line number Diff line
@@ -1219,7 +1219,6 @@ static void gem_rx_refill(struct macb_queue *queue) 
		/* Make hw descriptor updates visible to CPU */

		rmb();



		queue->rx_prepared_head++;

		desc = macb_rx_desc(queue, entry);



		if (!queue->rx_skbuff[entry]) {
@@ -1258,6 +1257,7 @@ static void gem_rx_refill(struct macb_queue *queue) 
			dma_wmb();

			desc->addr &= ~MACB_BIT(RX_USED);

		}

		queue->rx_prepared_head++;

	}



	/* Make descriptor updates visible to hardware */