Commit d8a324f1 authored by Kristina Martsenko's avatar Kristina Martsenko Committed by Catalin Marinas
Browse files

kselftest/arm64: add MOPS to hwcap test 



Add the MOPS hwcap to the hwcap kselftest and check that a SIGILL is not
generated when the feature is detected. A SIGILL is reliable when the
feature is not detected as SCTLR_EL1.MSCEn won't have been set.

Signed-off-by: default avatarKristina Martsenko <kristina.martsenko@arm.com>
Reviewed-by: default avatarMark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20230509142235.3284028-12-kristina.martsenko@arm.com


Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 3e1dedb2

tools/testing/selftests/arm64/abi/hwcap.c

+22 −0
Original line number Diff line number Diff line
@@ -39,6 +39,20 @@ static void cssc_sigill(void) 
	asm volatile(".inst 0xdac01c00" : : : "x0");

}



static void mops_sigill(void)

{

	char dst[1], src[1];

	register char *dstp asm ("x0") = dst;

	register char *srcp asm ("x1") = src;

	register long size asm ("x2") = 1;



	/* CPYP [x0]!, [x1]!, x2! */

	asm volatile(".inst 0x1d010440"

		     : "+r" (dstp), "+r" (srcp), "+r" (size)

		     :

		     : "cc", "memory");

}



static void rng_sigill(void)

{

	asm volatile("mrs x0, S3_3_C2_C4_0" : : : "x0");
@@ -209,6 +223,14 @@ static const struct hwcap_data { 
		.cpuinfo = "cssc",

		.sigill_fn = cssc_sigill,

	},

	{

		.name = "MOPS",

		.at_hwcap = AT_HWCAP2,

		.hwcap_bit = HWCAP2_MOPS,

		.cpuinfo = "mops",

		.sigill_fn = mops_sigill,

		.sigill_reliable = true,

	},

	{

		.name = "RNG",

		.at_hwcap = AT_HWCAP2,