Commit d86c1568 authored by Guillaume Ranquet's avatar Guillaume Ranquet Committed by Chun-Kuang Hu
Browse files

drm/mediatek: dpi: Add dp_intf support 



Dpintf is the displayport interface hardware unit. This unit is similar
to dpi and can reuse most of the code.

This patch adds support for mt8195-dpintf to this dpi driver. Main
differences are:
 - 4 pixels for one iteration for dp_intf while dpi is 1 pixel for one
   iteration.
 - Input of dp_intf is two pixels per iteration.
 - Some register contents differ slightly between the two components.

Signed-off-by: default avatarMarkus Schneider-Pargmann <msp@baylibre.com>
Signed-off-by: default avatarGuillaume Ranquet <granquet@baylibre.com>
Signed-off-by: default avatarBo-Chen Chen <rex-bc.chen@mediatek.com>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://patchwork.kernel.org/project/linux-mediatek/patch/20220705102530.1344-6-rex-bc.chen@mediatek.com/


Signed-off-by: default avatarChun-Kuang Hu <chunkuang.hu@kernel.org>
parent 49ecbb78

drivers/gpu/drm/mediatek/mtk_dpi.c

+32 −0
Original line number Diff line number Diff line
@@ -852,6 +852,16 @@ static unsigned int mt8183_calculate_factor(int clock) 
		return 2;

}



static unsigned int mt8195_dpintf_calculate_factor(int clock)

{

	if (clock < 70000)

		return 4;

	else if (clock < 200000)

		return 2;

	else

		return 1;

}



static const u32 mt8173_output_fmts[] = {

	MEDIA_BUS_FMT_RGB888_1X24,

};
@@ -861,6 +871,11 @@ static const u32 mt8183_output_fmts[] = { 
	MEDIA_BUS_FMT_RGB888_2X12_BE,

};



static const u32 mt8195_output_fmts[] = {

	MEDIA_BUS_FMT_RGB888_1X24,

	MEDIA_BUS_FMT_YUYV8_1X16,

};



static const struct mtk_dpi_conf mt8173_conf = {

	.cal_factor = mt8173_calculate_factor,

	.reg_h_fre_con = 0xe0,
@@ -930,6 +945,20 @@ static const struct mtk_dpi_conf mt8192_conf = { 
	.csc_enable_bit = CSC_ENABLE,

};



static const struct mtk_dpi_conf mt8195_dpintf_conf = {

	.cal_factor = mt8195_dpintf_calculate_factor,

	.max_clock_khz = 600000,

	.output_fmts = mt8195_output_fmts,

	.num_output_fmts = ARRAY_SIZE(mt8195_output_fmts),

	.pixels_per_iter = 4,

	.input_2pixel = true,

	.dimension_mask = DPINTF_HPW_MASK,

	.hvsize_mask = DPINTF_HSIZE_MASK,

	.channel_swap_shift = DPINTF_CH_SWAP,

	.yuv422_en_bit = DPINTF_YUV422_EN,

	.csc_enable_bit = DPINTF_CSC_ENABLE,

};



static int mtk_dpi_probe(struct platform_device *pdev)

{

	struct device *dev = &pdev->dev;
@@ -1052,6 +1081,9 @@ static const struct of_device_id mtk_dpi_of_ids[] = { 
	{ .compatible = "mediatek,mt8192-dpi",

	  .data = &mt8192_conf,

	},

	{ .compatible = "mediatek,mt8195-dp-intf",

	  .data = &mt8195_dpintf_conf,

	},

	{ },

};

MODULE_DEVICE_TABLE(of, mtk_dpi_of_ids);

drivers/gpu/drm/mediatek/mtk_dpi_regs.h

+11 −0
Original line number Diff line number Diff line
@@ -40,10 +40,13 @@ 
#define FAKE_DE_LEVEN			BIT(21)

#define FAKE_DE_RODD			BIT(22)

#define FAKE_DE_REVEN			BIT(23)

#define DPINTF_YUV422_EN		BIT(24)

#define DPINTF_CSC_ENABLE		BIT(26)

#define DPINTF_INPUT_2P_EN		BIT(29)



#define DPI_OUTPUT_SETTING	0x14

#define CH_SWAP				0

#define DPINTF_CH_SWAP			1

#define CH_SWAP_MASK			(0x7 << 0)

#define SWAP_RGB			0x00

#define SWAP_GBR			0x01
@@ -81,8 +84,10 @@ 
#define DPI_SIZE		0x18

#define HSIZE				0

#define HSIZE_MASK			(0x1FFF << 0)

#define DPINTF_HSIZE_MASK		(0xFFFF << 0)

#define VSIZE				16

#define VSIZE_MASK			(0x1FFF << 16)

#define DPINTF_VSIZE_MASK		(0xFFFF << 16)



#define DPI_DDR_SETTING		0x1C

#define DDR_EN				BIT(0)
@@ -94,24 +99,30 @@ 
#define DPI_TGEN_HWIDTH		0x20

#define HPW				0

#define HPW_MASK			(0xFFF << 0)

#define DPINTF_HPW_MASK			(0xFFFF << 0)



#define DPI_TGEN_HPORCH		0x24

#define HBP				0

#define HBP_MASK			(0xFFF << 0)

#define DPINTF_HBP_MASK			(0xFFFF << 0)

#define HFP				16

#define HFP_MASK			(0xFFF << 16)

#define DPINTF_HFP_MASK			(0xFFFF << 16)



#define DPI_TGEN_VWIDTH		0x28

#define DPI_TGEN_VPORCH		0x2C



#define VSYNC_WIDTH_SHIFT		0

#define VSYNC_WIDTH_MASK		(0xFFF << 0)

#define DPINTF_VSYNC_WIDTH_MASK		(0xFFFF << 0)

#define VSYNC_HALF_LINE_SHIFT		16

#define VSYNC_HALF_LINE_MASK		BIT(16)

#define VSYNC_BACK_PORCH_SHIFT		0

#define VSYNC_BACK_PORCH_MASK		(0xFFF << 0)

#define DPINTF_VSYNC_BACK_PORCH_MASK	(0xFFFF << 0)

#define VSYNC_FRONT_PORCH_SHIFT		16

#define VSYNC_FRONT_PORCH_MASK		(0xFFF << 16)

#define DPINTF_VSYNC_FRONT_PORCH_MASK	(0xFFFF << 16)



#define DPI_BG_HCNTL		0x30

#define BG_RIGHT			(0x1FFF << 0)

drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c

+4 −0
Original line number Diff line number Diff line
@@ -407,6 +407,7 @@ static const char * const mtk_ddp_comp_stem[MTK_DDP_COMP_TYPE_MAX] = { 
	[MTK_DISP_RDMA] = "rdma",

	[MTK_DISP_UFOE] = "ufoe",

	[MTK_DISP_WDMA] = "wdma",

	[MTK_DP_INTF] = "dp-intf",

	[MTK_DPI] = "dpi",

	[MTK_DSI] = "dsi",

};
@@ -425,6 +426,8 @@ static const struct mtk_ddp_comp_match mtk_ddp_matches[DDP_COMPONENT_ID_MAX] = { 
	[DDP_COMPONENT_COLOR0]		= { MTK_DISP_COLOR,	0, &ddp_color },

	[DDP_COMPONENT_COLOR1]		= { MTK_DISP_COLOR,	1, &ddp_color },

	[DDP_COMPONENT_DITHER0]		= { MTK_DISP_DITHER,	0, &ddp_dither },

	[DDP_COMPONENT_DP_INTF0]	= { MTK_DP_INTF,	0, &ddp_dpi },

	[DDP_COMPONENT_DP_INTF1]	= { MTK_DP_INTF,	1, &ddp_dpi },

	[DDP_COMPONENT_DPI0]		= { MTK_DPI,		0, &ddp_dpi },

	[DDP_COMPONENT_DPI1]		= { MTK_DPI,		1, &ddp_dpi },

	[DDP_COMPONENT_DSC0]		= { MTK_DISP_DSC,	0, &ddp_dsc },
@@ -548,6 +551,7 @@ int mtk_ddp_comp_init(struct device_node *node, struct mtk_ddp_comp *comp, 
	    type == MTK_DISP_PWM ||

	    type == MTK_DISP_RDMA ||

	    type == MTK_DPI ||

	    type == MTK_DP_INTF ||

	    type == MTK_DSI)

		return 0;

drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h

+1 −0
Original line number Diff line number Diff line
@@ -36,6 +36,7 @@ enum mtk_ddp_comp_type { 
	MTK_DISP_UFOE,

	MTK_DISP_WDMA,

	MTK_DPI,

	MTK_DP_INTF,

	MTK_DSI,

	MTK_DDP_COMP_TYPE_MAX,

};

drivers/gpu/drm/mediatek/mtk_drm_drv.c

+3 −0
Original line number Diff line number Diff line
@@ -633,6 +633,8 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = { 
	  .data = (void *)MTK_DPI },

	{ .compatible = "mediatek,mt8192-dpi",

	  .data = (void *)MTK_DPI },

	{ .compatible = "mediatek,mt8195-dp-intf",

	  .data = (void *)MTK_DP_INTF },

	{ .compatible = "mediatek,mt2701-dsi",

	  .data = (void *)MTK_DSI },

	{ .compatible = "mediatek,mt8173-dsi",
@@ -772,6 +774,7 @@ static int mtk_drm_probe(struct platform_device *pdev) 
		    comp_type == MTK_DISP_OVL ||

		    comp_type == MTK_DISP_OVL_2L ||

		    comp_type == MTK_DISP_RDMA ||

		    comp_type == MTK_DP_INTF ||

		    comp_type == MTK_DPI ||

		    comp_type == MTK_DSI) {

			dev_info(dev, "Adding component match for %pOF\n",