Commit d7fd3f9f authored by Quanyang Wang's avatar Quanyang Wang Committed by Stephen Boyd
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clk: zynqmp: move zynqmp_pll_set_mode out of round_rate callback 



The round_rate callback should only perform rate calculation and not
involve calling zynqmp_pll_set_mode to change the pll mode. So let's
move zynqmp_pll_set_mode out of round_rate and to set_rate callback.

Fixes: 3fde0e16 ("drivers: clk: Add ZynqMP clock driver")
Reported-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: default avatarQuanyang Wang <quanyang.wang@windriver.com>
Link: https://lore.kernel.org/r/20210406154015.602779-1-quanyang.wang@windriver.com


Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 21f23753

drivers/clk/zynqmp/pll.c

+6 −6
Original line number Diff line number Diff line
@@ -100,9 +100,7 @@ static long zynqmp_pll_round_rate(struct clk_hw *hw, unsigned long rate, 
	/* Enable the fractional mode if needed */

	rate_div = (rate * FRAC_DIV) / *prate;

	f = rate_div % FRAC_DIV;

	zynqmp_pll_set_mode(hw, !!f);



	if (zynqmp_pll_get_mode(hw) == PLL_MODE_FRAC) {

	if (f) {

		if (rate > PS_PLL_VCO_MAX) {

			fbdiv = rate / PS_PLL_VCO_MAX;

			rate = rate / (fbdiv + 1);
@@ -173,10 +171,12 @@ static int zynqmp_pll_set_rate(struct clk_hw *hw, unsigned long rate, 
	long rate_div, frac, m, f;

	int ret;



	if (zynqmp_pll_get_mode(hw) == PLL_MODE_FRAC) {

	rate_div = (rate * FRAC_DIV) / parent_rate;

		m = rate_div / FRAC_DIV;

	f = rate_div % FRAC_DIV;

	zynqmp_pll_set_mode(hw, !!f);



	if (f) {

		m = rate_div / FRAC_DIV;

		m = clamp_t(u32, m, (PLL_FBDIV_MIN), (PLL_FBDIV_MAX));

		rate = parent_rate * m;

		frac = (parent_rate * f) / FRAC_DIV;