Commit d7c1814f authored by Paul Gortmaker's avatar Paul Gortmaker Committed by Michael Ellerman
Browse files

powerpc: retire sbc8641d board support 



The support was for this was added to mainline over 12 years ago, in
v2.6.26 [4e8aae89] just around the ppc --> powerpc migration.

I believe the board was introduced shortly after the sbc8548 board,
making it roughly a 14 year old platform - with the CPU speed and
memory size typical for that era.

I haven't had one of these boards for several years, and availability
was discontinued several years before that.

Given that, there is no point in adding a burden to testing coverage
that builds all possible defconfigs, so it makes sense to remove it.

Of course it will remain in the git history forever, for anyone who
happens to find a functional board and wants to tinker with it.

Acked-by: default avatarScott Wood <oss@buserror.net>
Signed-off-by: default avatarPaul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent c12adb06

arch/powerpc/boot/dts/fsl/sbc8641d.dts

deleted100644 → 0
+0 −176
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-or-later

/*

 * SBC8641D Device Tree Source

 *

 * Copyright 2008 Wind River Systems Inc.

 *

 * Paul Gortmaker (see MAINTAINERS for contact information)

 *

 * Based largely on the mpc8641_hpcn.dts by Freescale Semiconductor Inc.

 */



/include/ "mpc8641si-pre.dtsi"



/ {

	model = "SBC8641D";

	compatible = "wind,sbc8641";



	memory {

		device_type = "memory";

		reg = <0x00000000 0x20000000>;	// 512M at 0x0

	};



	lbc: localbus@f8005000 {

		reg = <0xf8005000 0x1000>;



		ranges = <0 0 0xff000000 0x01000000	// 16MB Boot flash

			  1 0 0xf0000000 0x00010000	// 64KB EEPROM

			  2 0 0xf1000000 0x00100000	// EPLD (1MB)

			  3 0 0xe0000000 0x04000000	// 64MB LB SDRAM (CS3)

			  4 0 0xe4000000 0x04000000	// 64MB LB SDRAM (CS4)

			  6 0 0xf4000000 0x00100000	// LCD display (1MB)

			  7 0 0xe8000000 0x04000000>;	// 64MB OneNAND



		flash@0,0 {

			compatible = "cfi-flash";

			reg = <0 0 0x01000000>;

			bank-width = <2>;

			device-width = <2>;

			#address-cells = <1>;

			#size-cells = <1>;

			partition@0 {

				label = "dtb";

				reg = <0x00000000 0x00100000>;

				read-only;

			};

			partition@300000 {

				label = "kernel";

				reg = <0x00100000 0x00400000>;

				read-only;

			};

			partition@400000 {

				label = "fs";

				reg = <0x00500000 0x00a00000>;

			};

			partition@700000 {

				label = "firmware";

				reg = <0x00f00000 0x00100000>;

				read-only;

			};

		};



		epld@2,0 {

			compatible = "wrs,epld-localbus";

			#address-cells = <2>;

			#size-cells = <1>;

			reg = <2 0 0x100000>;

			ranges = <0 0 5 0 1	// User switches

				  1 0 5 1 1	// Board ID/Rev

				  3 0 5 3 1>;	// LEDs

		};

	};



	soc: soc@f8000000 {

		ranges = <0x00000000 0xf8000000 0x00100000>;



		enet0: ethernet@24000 {

			tbi-handle = <&tbi0>;

			phy-handle = <&phy0>;

			phy-connection-type = "rgmii-id";

		};



		mdio@24520 {

			phy0: ethernet-phy@1f {

				reg = <0x1f>;

			};

			phy1: ethernet-phy@0 {

				reg = <0>;

			};

			phy2: ethernet-phy@1 {

				reg = <1>;

			};

			phy3: ethernet-phy@2 {

				reg = <2>;

			};

			tbi0: tbi-phy@11 {

				reg = <0x11>;

				device_type = "tbi-phy";

			};

		};



		enet1: ethernet@25000 {

			tbi-handle = <&tbi1>;

			phy-handle = <&phy1>;

			phy-connection-type = "rgmii-id";

		};



		mdio@25520 {

			tbi1: tbi-phy@11 {

				reg = <0x11>;

				device_type = "tbi-phy";

			};

		};



		enet2: ethernet@26000 {

			tbi-handle = <&tbi2>;

			phy-handle = <&phy2>;

			phy-connection-type = "rgmii-id";

		};



		mdio@26520 {

			tbi2: tbi-phy@11 {

				reg = <0x11>;

				device_type = "tbi-phy";

			};

		};



		enet3: ethernet@27000 {

			tbi-handle = <&tbi3>;

			phy-handle = <&phy3>;

			phy-connection-type = "rgmii-id";

		};



		mdio@27520 {

			tbi3: tbi-phy@11 {

				reg = <0x11>;

				device_type = "tbi-phy";

			};

		};

	};



	pci0: pcie@f8008000 {

		reg = <0xf8008000 0x1000>;

		ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000

			  0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;

		interrupt-map-mask = <0xff00 0 0 7>;



		pcie@0 {

			ranges = <0x02000000 0x0 0x80000000

				  0x02000000 0x0 0x80000000

				  0x0 0x20000000



				  0x01000000 0x0 0x00000000

				  0x01000000 0x0 0x00000000

				  0x0 0x00100000>;

		};



	};



	pci1: pcie@f8009000 {

		reg = <0xf8009000 0x1000>;

		ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000

			  0x01000000 0x0 0x00000000 0xe3000000 0x0 0x00100000>;



		pcie@0 {

			ranges = <0x02000000 0x0 0xa0000000

				  0x02000000 0x0 0xa0000000

				  0x0 0x20000000



				  0x01000000 0x0 0x00000000

				  0x01000000 0x0 0x00000000

				  0x0 0x00100000>;

		};

	};

};



/include/ "mpc8641si-post.dtsi"

arch/powerpc/configs/mpc86xx_base.config

+0 −1
Original line number Diff line number Diff line 
CONFIG_PPC_86xx=y

CONFIG_MPC8641_HPCN=y

CONFIG_SBC8641D=y

CONFIG_MPC8610_HPCD=y

CONFIG_GEF_PPC9A=y

CONFIG_GEF_SBC310=y

arch/powerpc/configs/ppc6xx_defconfig

+0 −1
Original line number Diff line number Diff line
@@ -55,7 +55,6 @@ CONFIG_MPC837x_RDB=y 
CONFIG_ASP834x=y

CONFIG_PPC_86xx=y

CONFIG_MPC8641_HPCN=y

CONFIG_SBC8641D=y

CONFIG_MPC8610_HPCD=y

CONFIG_GEF_SBC610=y

CONFIG_CPU_FREQ=y

arch/powerpc/platforms/86xx/Kconfig

+1 −7
Original line number Diff line number Diff line
@@ -20,12 +20,6 @@ config MPC8641_HPCN 
	help

	  This option enables support for the MPC8641 HPCN board.



config SBC8641D

	bool "Wind River SBC8641D"

	select DEFAULT_UIMAGE

	help

	  This option enables support for the WRS SBC8641D board.



config MPC8610_HPCD

	bool "Freescale MPC8610 HPCD"

	select DEFAULT_UIMAGE
@@ -74,7 +68,7 @@ config MPC8641 
	select FSL_PCI if PCI

	select PPC_UDBG_16550

	select MPIC

	default y if MPC8641_HPCN || SBC8641D || GEF_SBC610 || GEF_SBC310 || GEF_PPC9A \

	default y if MPC8641_HPCN || GEF_SBC610 || GEF_SBC310 || GEF_PPC9A \

			|| MVME7100



config MPC8610

arch/powerpc/platforms/86xx/Makefile

+0 −1
Original line number Diff line number Diff line
@@ -6,7 +6,6 @@ 
obj-y				:= pic.o common.o

obj-$(CONFIG_SMP)		+= mpc86xx_smp.o

obj-$(CONFIG_MPC8641_HPCN)	+= mpc86xx_hpcn.o

obj-$(CONFIG_SBC8641D)		+= sbc8641d.o

obj-$(CONFIG_MPC8610_HPCD)	+= mpc8610_hpcd.o

obj-$(CONFIG_GEF_SBC610)	+= gef_sbc610.o

obj-$(CONFIG_GEF_SBC310)	+= gef_sbc310.o