Commit d7709eb6 authored by Prike Liang's avatar Prike Liang Committed by Alex Deucher
Browse files

drm/amdgpu: enable gfxoff routine for GC 10.3.7 



Enable gfxoff routine for GC 10.3.7.

Signed-off-by: default avatarPrike Liang <Prike.Liang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent fabe1753

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

+3 −0
Original line number Original line Diff line number Diff line
@@ -6557,6 +6557,7 @@ static void gfx_v10_0_kiq_setting(struct amdgpu_ring *ring) 
	case IP_VERSION(10, 3, 5):

	case IP_VERSION(10, 3, 5):

	case IP_VERSION(10, 3, 6):

	case IP_VERSION(10, 3, 6):

	case IP_VERSION(10, 3, 3):

	case IP_VERSION(10, 3, 3):

	case IP_VERSION(10, 3, 7):

		tmp = RREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS_Sienna_Cichlid);

		tmp = RREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS_Sienna_Cichlid);

		tmp &= 0xffffff00;

		tmp &= 0xffffff00;

		tmp |= (ring->me << 5) | (ring->pipe << 3) | (ring->queue);

		tmp |= (ring->me << 5) | (ring->pipe << 3) | (ring->queue);
@@ -7857,6 +7858,7 @@ static void gfx_v10_0_set_safe_mode(struct amdgpu_device *adev) 
	case IP_VERSION(10, 3, 5):

	case IP_VERSION(10, 3, 5):

	case IP_VERSION(10, 3, 6):

	case IP_VERSION(10, 3, 6):

	case IP_VERSION(10, 3, 3):

	case IP_VERSION(10, 3, 3):

	case IP_VERSION(10, 3, 7):

		WREG32_SOC15(GC, 0, mmRLC_SAFE_MODE_Sienna_Cichlid, data);

		WREG32_SOC15(GC, 0, mmRLC_SAFE_MODE_Sienna_Cichlid, data);





		/* wait for RLC_SAFE_MODE */

		/* wait for RLC_SAFE_MODE */
@@ -7894,6 +7896,7 @@ static void gfx_v10_0_unset_safe_mode(struct amdgpu_device *adev) 
	case IP_VERSION(10, 3, 5):

	case IP_VERSION(10, 3, 5):

	case IP_VERSION(10, 3, 6):

	case IP_VERSION(10, 3, 6):

	case IP_VERSION(10, 3, 3):

	case IP_VERSION(10, 3, 3):

	case IP_VERSION(10, 3, 7):

		WREG32_SOC15(GC, 0, mmRLC_SAFE_MODE_Sienna_Cichlid, data);

		WREG32_SOC15(GC, 0, mmRLC_SAFE_MODE_Sienna_Cichlid, data);

		break;

		break;

	default:

	default:

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c

+1 −0
Original line number Original line Diff line number Diff line
@@ -752,6 +752,7 @@ int smu_v13_0_gfx_off_control(struct smu_context *smu, bool enable) 
	case IP_VERSION(13, 0, 1):

	case IP_VERSION(13, 0, 1):

	case IP_VERSION(13, 0, 3):

	case IP_VERSION(13, 0, 3):

	case IP_VERSION(13, 0, 5):

	case IP_VERSION(13, 0, 5):

	case IP_VERSION(13, 0, 8):

		if (!(adev->pm.pp_feature & PP_GFXOFF_MASK))

		if (!(adev->pm.pp_feature & PP_GFXOFF_MASK))

			return 0;

			return 0;

		if (enable)

		if (enable)