Commit d75b3362 authored by Anup Patel's avatar Anup Patel Committed by Anup Patel
Browse files

RISC-V: KVM: Allow Svnapot extension for Guest/VM 



We extend the KVM ISA extension ONE_REG interface to allow KVM
user space to detect and enable Svnapot extension for Guest/VM.

Signed-off-by: default avatarAnup Patel <apatel@ventanamicro.com>
Reviewed-by: default avatarAndrew Jones <ajones@ventanamicro.com>
Signed-off-by: default avatarAnup Patel <anup@brainfault.org>
parent 377f71f6

arch/riscv/include/uapi/asm/kvm.h

+1 −0
Original line number Diff line number Diff line
@@ -122,6 +122,7 @@ enum KVM_RISCV_ISA_EXT_ID { 
	KVM_RISCV_ISA_EXT_ZICBOZ,

	KVM_RISCV_ISA_EXT_ZBB,

	KVM_RISCV_ISA_EXT_SSAIA,

	KVM_RISCV_ISA_EXT_SVNAPOT,

	KVM_RISCV_ISA_EXT_MAX,

};

arch/riscv/kvm/vcpu.c

+2 −0
Original line number Diff line number Diff line
@@ -61,6 +61,7 @@ static const unsigned long kvm_isa_ext_arr[] = { 
	KVM_ISA_EXT_ARR(SSAIA),

	KVM_ISA_EXT_ARR(SSTC),

	KVM_ISA_EXT_ARR(SVINVAL),

	KVM_ISA_EXT_ARR(SVNAPOT),

	KVM_ISA_EXT_ARR(SVPBMT),

	KVM_ISA_EXT_ARR(ZBB),

	KVM_ISA_EXT_ARR(ZIHINTPAUSE),
@@ -102,6 +103,7 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext) 
	case KVM_RISCV_ISA_EXT_SSAIA:

	case KVM_RISCV_ISA_EXT_SSTC:

	case KVM_RISCV_ISA_EXT_SVINVAL:

	case KVM_RISCV_ISA_EXT_SVNAPOT:

	case KVM_RISCV_ISA_EXT_ZIHINTPAUSE:

	case KVM_RISCV_ISA_EXT_ZBB:

		return false;