Commit d7513508 authored by Shyam Sundar S K's avatar Shyam Sundar S K Committed by David S. Miller
Browse files

amd-xgbe: Update DMA coherency values 



Based on the IOMMU configuration, the current cache control settings can
result in possible coherency issues. The hardware team has recommended
new settings for the PCI device path to eliminate the issue.

Fixes: 6f595959 ("amd-xgbe: Adjust register settings to improve performance")
Signed-off-by: default avatarShyam Sundar S K <Shyam-sundar.S-k@amd.com>
Acked-by: default avatarTom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 3e6fdeb2

drivers/net/ethernet/amd/xgbe/xgbe.h

+3 −3
Original line number Diff line number Diff line
@@ -180,9 +180,9 @@ 
#define XGBE_DMA_SYS_AWCR	0x30303030



/* DMA cache settings - PCI device */

#define XGBE_DMA_PCI_ARCR	0x00000003

#define XGBE_DMA_PCI_AWCR	0x13131313

#define XGBE_DMA_PCI_AWARCR	0x00000313

#define XGBE_DMA_PCI_ARCR	0x000f0f0f

#define XGBE_DMA_PCI_AWCR	0x0f0f0f0f

#define XGBE_DMA_PCI_AWARCR	0x00000f0f



/* DMA channel interrupt modes */

#define XGBE_IRQ_MODE_EDGE	0