Commit d7118bbd authored by Sebastien Guiriec's avatar Sebastien Guiriec Committed by Benoit Cousson
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ARM: dts: omap5: Update I2C with address space and interrupts 



Add base address and interrupt line inside Device Tree data for
OMAP5

Signed-off-by: default avatarSebastien Guiriec <s-guiriec@ti.com>
Reviewed-by: default avatarShubhrajyoti D <shubhrajyoti@ti.com>
Signed-off-by: default avatarBenoit Cousson <b-cousson@ti.com>
parent f4b224f2

arch/arm/boot/dts/omap5.dtsi

+12 −2
Original line number Diff line number Diff line
@@ -192,6 +192,8 @@ 


		i2c1: i2c@48070000 {

			compatible = "ti,omap4-i2c";

			reg = <0x48070000 0x100>;

			interrupts = <0 56 0x4>;

			#address-cells = <1>;

			#size-cells = <0>;

			ti,hwmods = "i2c1";
@@ -199,6 +201,8 @@ 


		i2c2: i2c@48072000 {

			compatible = "ti,omap4-i2c";

			reg = <0x48072000 0x100>;

			interrupts = <0 57 0x4>;

			#address-cells = <1>;

			#size-cells = <0>;

			ti,hwmods = "i2c2";
@@ -206,20 +210,26 @@ 


		i2c3: i2c@48060000 {

			compatible = "ti,omap4-i2c";

			reg = <0x48060000 0x100>;

			interrupts = <0 61 0x4>;

			#address-cells = <1>;

			#size-cells = <0>;

			ti,hwmods = "i2c3";

		};



		i2c4: i2c@4807A000 {

		i2c4: i2c@4807a000 {

			compatible = "ti,omap4-i2c";

			reg = <0x4807a000 0x100>;

			interrupts = <0 62 0x4>;

			#address-cells = <1>;

			#size-cells = <0>;

			ti,hwmods = "i2c4";

		};



		i2c5: i2c@4807C000 {

		i2c5: i2c@4807c000 {

			compatible = "ti,omap4-i2c";

			reg = <0x4807c000 0x100>;

			interrupts = <0 60 0x4>;

			#address-cells = <1>;

			#size-cells = <0>;

			ti,hwmods = "i2c5";