Commit d707d3f2 authored by Jack Xu's avatar Jack Xu Committed by Herbert Xu
Browse files

crypto: qat - add FCU CSRs to chip info 



Add firmware control unit (FCU) CSRs to chip info so the firmware
authentication code is common between all devices.

Signed-off-by: default avatarJack Xu <jack.xu@intel.com>
Co-developed-by: default avatarWojciech Ziemba <wojciech.ziemba@intel.com>
Signed-off-by: default avatarWojciech Ziemba <wojciech.ziemba@intel.com>
Reviewed-by: default avatarGiovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent 9e0f74b7

drivers/crypto/qat/qat_common/icp_qat_fw_loader_handle.h

+6 −0
Original line number Diff line number Diff line
@@ -34,6 +34,12 @@ struct icp_qat_fw_loader_chip_info { 
	u32 wakeup_event_val;

	bool fw_auth;

	bool css_3k;

	u32 fcu_ctl_csr;

	u32 fcu_sts_csr;

	u32 fcu_dram_addr_hi;

	u32 fcu_dram_addr_lo;

	u32 fcu_loaded_ae_csr;

	u8 fcu_loaded_ae_pos;

};



struct icp_qat_fw_loader_handle {

drivers/crypto/qat/qat_common/qat_hal.c

+17 −2
Original line number Diff line number Diff line
@@ -707,6 +707,12 @@ static int qat_hal_chip_init(struct icp_qat_fw_loader_handle *handle, 
		handle->chip_info->wakeup_event_val = WAKEUP_EVENT;

		handle->chip_info->fw_auth = true;

		handle->chip_info->css_3k = false;

		handle->chip_info->fcu_ctl_csr = FCU_CONTROL;

		handle->chip_info->fcu_sts_csr = FCU_STATUS;

		handle->chip_info->fcu_dram_addr_hi = FCU_DRAM_ADDR_HI;

		handle->chip_info->fcu_dram_addr_lo = FCU_DRAM_ADDR_LO;

		handle->chip_info->fcu_loaded_ae_csr = FCU_STATUS;

		handle->chip_info->fcu_loaded_ae_pos = FCU_LOADED_AE_POS;

		break;

	case PCI_DEVICE_ID_INTEL_QAT_DH895XCC:

		handle->chip_info->sram_visible = true;
@@ -719,6 +725,12 @@ static int qat_hal_chip_init(struct icp_qat_fw_loader_handle *handle, 
		handle->chip_info->wakeup_event_val = WAKEUP_EVENT;

		handle->chip_info->fw_auth = false;

		handle->chip_info->css_3k = false;

		handle->chip_info->fcu_ctl_csr = 0;

		handle->chip_info->fcu_sts_csr = 0;

		handle->chip_info->fcu_dram_addr_hi = 0;

		handle->chip_info->fcu_dram_addr_lo = 0;

		handle->chip_info->fcu_loaded_ae_csr = 0;

		handle->chip_info->fcu_loaded_ae_pos = 0;

		break;

	default:

		ret = -EINVAL;
@@ -842,17 +854,20 @@ int qat_hal_start(struct icp_qat_fw_loader_handle *handle) 
{

	unsigned long ae_mask = handle->hal_handle->ae_mask;

	u32 wakeup_val = handle->chip_info->wakeup_event_val;

	u32 fcu_ctl_csr, fcu_sts_csr;

	unsigned int fcu_sts;

	unsigned char ae;

	u32 ae_ctr = 0;

	int retry = 0;



	if (handle->chip_info->fw_auth) {

		fcu_ctl_csr = handle->chip_info->fcu_ctl_csr;

		fcu_sts_csr = handle->chip_info->fcu_sts_csr;

		ae_ctr = hweight32(ae_mask);

		SET_CAP_CSR(handle, FCU_CONTROL, FCU_CTRL_CMD_START);

		SET_CAP_CSR(handle, fcu_ctl_csr, FCU_CTRL_CMD_START);

		do {

			msleep(FW_AUTH_WAIT_PERIOD);

			fcu_sts = GET_CAP_CSR(handle, FCU_STATUS);

			fcu_sts = GET_CAP_CSR(handle, fcu_sts_csr);

			if (((fcu_sts >> FCU_STS_DONE_POS) & 0x1))

				return ae_ctr;

		} while (retry++ < FW_AUTH_MAX_RETRY);

drivers/crypto/qat/qat_common/qat_uclo.c

+30 −14
Original line number Diff line number Diff line
@@ -1190,18 +1190,26 @@ static int qat_uclo_map_suof(struct icp_qat_fw_loader_handle *handle, 
static int qat_uclo_auth_fw(struct icp_qat_fw_loader_handle *handle,

			    struct icp_qat_fw_auth_desc *desc)

{

	unsigned int fcu_sts, retry = 0;

	u32 fcu_sts, retry = 0;

	u32 fcu_ctl_csr, fcu_sts_csr;

	u32 fcu_dram_hi_csr, fcu_dram_lo_csr;

	u64 bus_addr;



	bus_addr = ADD_ADDR(desc->css_hdr_high, desc->css_hdr_low)

			   - sizeof(struct icp_qat_auth_chunk);

	SET_CAP_CSR(handle, FCU_DRAM_ADDR_HI, (bus_addr >> BITS_IN_DWORD));

	SET_CAP_CSR(handle, FCU_DRAM_ADDR_LO, bus_addr);

	SET_CAP_CSR(handle, FCU_CONTROL, FCU_CTRL_CMD_AUTH);



	fcu_ctl_csr = handle->chip_info->fcu_ctl_csr;

	fcu_sts_csr = handle->chip_info->fcu_sts_csr;

	fcu_dram_hi_csr = handle->chip_info->fcu_dram_addr_hi;

	fcu_dram_lo_csr = handle->chip_info->fcu_dram_addr_lo;



	SET_CAP_CSR(handle, fcu_dram_hi_csr, (bus_addr >> BITS_IN_DWORD));

	SET_CAP_CSR(handle, fcu_dram_lo_csr, bus_addr);

	SET_CAP_CSR(handle, fcu_ctl_csr, FCU_CTRL_CMD_AUTH);



	do {

		msleep(FW_AUTH_WAIT_PERIOD);

		fcu_sts = GET_CAP_CSR(handle, FCU_STATUS);

		fcu_sts = GET_CAP_CSR(handle, fcu_sts_csr);

		if ((fcu_sts & FCU_AUTH_STS_MASK) == FCU_STS_VERI_FAIL)

			goto auth_fail;

		if (((fcu_sts >> FCU_STS_AUTHFWLD_POS) & 0x1))
@@ -1369,11 +1377,16 @@ static int qat_uclo_map_auth_fw(struct icp_qat_fw_loader_handle *handle, 
static int qat_uclo_load_fw(struct icp_qat_fw_loader_handle *handle,

			    struct icp_qat_fw_auth_desc *desc)

{

	unsigned int i;

	unsigned int fcu_sts;

	struct icp_qat_simg_ae_mode *virt_addr;

	unsigned int fcu_loaded_ae_pos = FCU_LOADED_AE_POS;

	unsigned long ae_mask = handle->hal_handle->ae_mask;

	u32 fcu_sts_csr, fcu_ctl_csr;

	u32 loaded_aes, loaded_csr;

	unsigned int i;

	u32 fcu_sts;



	fcu_ctl_csr = handle->chip_info->fcu_ctl_csr;

	fcu_sts_csr = handle->chip_info->fcu_sts_csr;

	loaded_csr = handle->chip_info->fcu_loaded_ae_csr;



	virt_addr = (void *)((uintptr_t)desc +

		     sizeof(struct icp_qat_auth_chunk) +
@@ -1389,16 +1402,19 @@ static int qat_uclo_load_fw(struct icp_qat_fw_loader_handle *handle, 
			pr_err("QAT: AE %d is active\n", i);

			return -EINVAL;

		}

		SET_CAP_CSR(handle, FCU_CONTROL,

		SET_CAP_CSR(handle, fcu_ctl_csr,

			    (FCU_CTRL_CMD_LOAD | (i << FCU_CTRL_AE_POS)));



		do {

			msleep(FW_AUTH_WAIT_PERIOD);

			fcu_sts = GET_CAP_CSR(handle, FCU_STATUS);

			if (((fcu_sts & FCU_AUTH_STS_MASK) ==

			    FCU_STS_LOAD_DONE) &&

			    ((fcu_sts >> fcu_loaded_ae_pos) & (1 << i)))

			fcu_sts = GET_CAP_CSR(handle, fcu_sts_csr);

			if ((fcu_sts & FCU_AUTH_STS_MASK) ==

			    FCU_STS_LOAD_DONE) {

				loaded_aes = GET_CAP_CSR(handle, loaded_csr);

				loaded_aes >>= handle->chip_info->fcu_loaded_ae_pos;

				if (loaded_aes & (1 << i))

					break;

			}

		} while (retry++ < FW_AUTH_MAX_RETRY);

		if (retry > FW_AUTH_MAX_RETRY) {

			pr_err("QAT: firmware load failed timeout %x\n", retry);